RE: [RPRWG] 802.17 Outline: Stratum Clock distribution?
Hello Jean-Pierre,
I am not sure I understand exactly what you mean.
Please remember also that there is no synchronization requirement for RPR. I am not saying that the standard should preclude the possibility of doing circuit emulation, that is why different insertion and transit path behaviors adapted to different
applications should be allowed in the standard, but it is not the standard's role to impose whether and how to do synchronization at the MAC layer.
regards,
Jeanne
jean-pierre.burvenich@xxxxxxxxxxx on 22/11/2001 12:30:44
To: Jeanne DE JAEGHER/BE/ALCATEL@ALCATEL,
stds-802-17@xxxxxxxx
cc:
Subject: RE: [RPRWG] 802.17 Outline: Stratum Clock
distribution?
As usual when it comes to this subject (synchronisation) in the context of
introducing/defining a new technology, everybody is wondering what this is
good for, and nobody remebers who put it on the agenda neither why he/she
did it.
-)
I do not know it either.
But I do believe it is a good idea to keet the item as a placeholderfor the
time being.
The question is: does the RPR concept have an impact on the possible
requirement for synchronization of either
something happenining within the RPR layer itself(in which case the item
should preferably be dealt with in the standard)
or
happening in a different (i.c. PHY) but impacted by the presence of the RPR
mechanism for some services supported.
e.g. Timing quality required for emulated LL circuits routed across RPR
could be hard to meet if PHY layer supporting RPR is not synchronized to a
certain standard (does not mean I pretend this - just a hypothetical
example).
JP Burvenich
-----Original Message-----
From: Jeanne.De_Jaegher@xxxxxxxxxx [mailto:Jeanne.De_Jaegher@xxxxxxxxxx]
Sent: 22 November 2001 10:18
To: stds-802-17@xxxxxxxx
Subject: RE: [RPRWG] 802.17 Outline: Stratum Clock distribution?
It seems nobody really knows what it really means or why this section
suddenly appeared in the outline for .17.
If it's like James says, synchronization for circuit emulation this is
indeed not something that should be part of the RPR standard.
Also since we are not defining a PHY layer, I don't understand why we should
bother with synchronization or lack of synchronization in the different PHY
layers we are going to use.
Can we momentarily remove this section from the outline. If in the future we
all agree on content and purpose of this section, we can always add it
again.
jeanne
"Chan, James" <jchan@xxxxxxxxxxxxxxxxx> on 21/11/2001 22:32:51
To: "'djz@xxxxxxxxxxx'" <djz@xxxxxxxxxxx>, Jeanne DE
JAEGHER/BE/ALCATEL@ALCATEL
cc: stds-802-17@xxxxxxxx
Subject: RE: [RPRWG] 802.17 Outline: Stratum Clock
distribution?
Stratum Clock Distribution to me means ANSI T1.101 Synchronization hierarchy
standard. This is very different to time-of-day clocks. Synchronization is
necessary from PSTN (TDM voice) perspective. It may also be required for a
RPR network supporting circuit emulation services (there may be other ways
to do it without synchronization). However, this is an implementation
specific issue which should not be part of the RPR standard. Individual
vendors may choose to do it as their differentiator.
I was not aware of stratum clock discussion in the last meeting. Can any
else shed some light?
Regards,
James Chan
-----Original Message-----
From: David James [mailto:djz@xxxxxxxxxxx]
Sent: Wednesday, November 21, 2001 10:14 AM
To: Jeanne.De_Jaegher@xxxxxxxxxx
Cc: stds-802-17@xxxxxxxx
Subject: RE: [RPRWG] 802.17 Outline: Stratum Clock distribution?
Jeanne,
Some physical layers have no provisions for accurately
synchronizing time-of-day clocks (GMT like clocks) of
clock slave's to clock masters.
For physical layers without such services, this clause
describes how such time-of-day clocks can be accurately
synchronized by MAC-level services.
From IEEE Std 1394 Serial Bus experiences, as well as
the telecom industry as a whole, the value of synchronous
transfers is greatly increased if time-of-day clocks
can also be synchronized.
DVJ
David V. James, PhD
Chief Architect
Network Processing Solutions
Data Communications Division
Cypress Semiconductor
110 Nortech Parkway
San Jose, CA 95134
Work: +1.408.942.2010
Cell: +1.650.954.6906
Fax: +1.408.942.2099
Work: djz@xxxxxxxxxxx
Base: dvj@xxxxxxxxxxxx
> -----Original Message-----
> From: owner-stds-802-17@xxxxxxxxxxxxxxxxxx
> [mailto:owner-stds-802-17@xxxxxxxxxxxxxxxxxx]On Behalf Of
> Jeanne.De_Jaegher@xxxxxxxxxx
> Sent: Wednesday, November 21, 2001 3:17 AM
> To: stds-802-17@xxxxxxxx
> Subject: [RPRWG] 802.17 Outline: Stratum Clock distribution?
>
>
>
>
>
> Good morning,
>
> Can someone tell me what the section over Stratum Clock
> Distribution covers?
>
>
> Thank's
>
> Jeanne
>
>
>
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