RE: [10GBASE-T] Re: [10GBT-Modeling] A question list we need to answer
Xiaopeng
I think in your list, you have captured the main issues which need to be addressed and from which real progress can be made. Namely, can 10G on structured UTP be achieved considering both fundamental and implementation limitations? The comment I would like to make is that in a collective group it will be hard to have 100% consensus on the best performance metric or cancellation level or AFE linearity unless the group is doing the entire system design. Not possible, since we work at different companies. So, it is not very likely that we, as whole, can progress through a flowchart and exit a decision diamond into feasibility. Some may bail early, others are in it for the long haul. My suggestion is to stick with a list of critical questions and solicit presentations addressing them, but, don't impose a decision methodology for the group.
Regards
Bill
-----Original Message-----
From: xichen@marvell.com [mailto:xichen@marvell.com]
Sent: Wednesday, February 26, 2003 6:21 PM
To: Joseph Babanezhad
Cc: stds-802-3-10GBT-Modeling@ieee.org; stds-802-3-10GBT@ieee.org
Subject: Re: [10GBASE-T] Re: [10GBT-Modeling] A question list we need to
answer
Joseph,
Good point. How about to modify the list to
7) If yes to 5), then is there any other factors (e.g., analog front-end's
linearity, ADC's quantization noise, ADC's jitter-limited ENOB etc.) that
may change the answer?
8) If yes to 7), then what should we do next?
9) If no to 7), then should we run more simulations such as bit-by-bit
time-domain simulations (can it be implementation independent?) to verify
the conclusion?
Xiaopeng
"Joseph Babanezhad" <jobaba@platolabs.com>@majordomo.ieee.org on 02/26/2003
05:57:49 PM
Sent by: owner-stds-802-3-10gbt@majordomo.ieee.org
To: xichen@marvell.com
cc: <stds-802-3-10GBT-Modeling@ieee.org>, <stds-802-3-10GBT@ieee.org>
Subject: [10GBASE-T] Re: [10GBT-Modeling] A question list we need to
answer
Xiaopeng,
Your list of questions is good. However, since this is feasibility
study we have to also keep some high-level implementation issues in mind.
Among them would be analog front-end's linearity, ADC's quantization
noise, ADC's jitter-limited ENOB etc.
Joseph N. Babanezhad
Plato Labs.
> Hi, all,
>
> I think we have had some quite meaningful discussions in this group
> on our project. Following George's idea, I list the following
> questions that we need to answer to make constructive progress in
> our discussion on this reflector and in the coming Dallas meeting.
>
> 1) Is the channel capacity metric meaningful in 10GBT?
> 2) If no to 1), then what metric we should use to finish our work?
> 3) If yes to 1), what channel/noise data we should use? (cabling
> ad-hoc group is working hard on this) 4) If yes to 1), what
> noise/interference cancellation levels can be achieved in the real-
> world? (Dallas meeting topic, I think) 5) Is the current target
> (100m CAT-5E/CAT-6) achievable based on the metric we choose? 6) If
> no to 5), then what should we do next? 7) If yes to 5), then is
> there more simulations (for example, time-domain simulations) need
> to be carried out for verification?
>
> The list can be imcomplete, so please let us know your opinion.
>
> Best Regards,
>
> Xiaopeng
> Marvell Semiconductor
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