ollowing Brad's reminder regarding
the deadline, here is some information relevant to the upcoming meeting. We currently have about 199 TBD's in Draft
1.1
The major topics are in PMA and PCS
sections are:
Digital: PCS(55.3), PMA(55.4):
Framing: Detailed XGMII to
PAM12 mapping including selection of the specific
LDPC code to be used and
the and bit2PAM mappings for the
coded bits as well as the uncoded bits. Sections 55.1.3.1, Fig 55-6,
55-7, 55.3.5, 55.3.8, 55.3.12.2.3
Sets of
coefficients for TH Precoders.
Section 55.4.3.1
Power backoff.
Sections 55.1.4, 55.2.1.2.1, 55.2.4.1,
Start-up (PMA
training, polarity and pair swap patterns, PAM2 levels, state diagrams, timers,
etc). Sections 55.1.4, 55.3.11.[1-3], Fig 55-13, 55.4.2.4,
55.4.5.2,
Loop Timing.
Sections 55.4.2.2
LBER (target
LDPC block error rate and link monitors). Sections 55.3.12.2.2,
55.3.12.2.4, 55.3.2, Fig 55-14, 55.4.2.3
Loopback
55.3.13.3
Analog: PMA Elect (55.5)
Transmit PSD
masks
Transmit time-domain
templates - though a number of people have contacted me to say that these are
not needed and not helpful - in which case we should discuss eliminating
these
Test
Channel configurations for some of the
tests
Test Modes - there has been some debate on whether some of the
tests should be done with spectrum analyzers or with oscilloscopes - which has
implications for how the tests are
specified.
Jitter
specifications
Power
backoff
A large number of TBDS pertain to Clause
28 and to the management section (55.5). There are tables with many entries
listed as TBDs.
Please come prepared for a busy session as
we try to fill in the TBDs.
.