Re: 8B/10B Code and Error Correction

[Jaime Kardontchik <kardontchik.jaime@xxxxxxxxxxx>]

widmer@xxxxxxxxxx wrote:

> Several contributors have emphasized the need for very low error rates. The
> 8B/10B code makes it easier to achieve and verify that performance for any kind
> of data pattern, rather than just random data. The code also has good built-in
> error detection and error locating capabilities which can be exploited for error
> correction with negligible additional bandwidth. US Patent 5,740,186 "Apparatus
> and Method for Error Correction based on Transmission Code Violations and
> Parity", Apr. 14 1998, describes a detailed example of the technique.
>
> Albert X. Widmer
> IBM T.J. Watson Research Center
> Tel. 914-945-2047
> widmer@xxxxxxxxxx


If I understood correctly what is said in the patent,
if one would like to correct an isolated error in a frame
he will have to accept an added delay, or latency, equal
to the length of the frame. The approach suggested in
the patent is "to store the received frame in a 
dedicated buffer between the decoder and the next level
of hardware. After a complete frame has been received
and after the erroneous byte, if any, has been located,
the data transfer to the next level starts. And the
faulty byte is corrected on the fly." (page 12,
paragraph 30).

Any comments about whether this added latency could
be acceptable in 10-Gigabit Ethernet ?

Any comments about the added cost ? Could one give
a rough estimation of the number of gates taken by
the standard 8b/10b encoder/decoder and how this
compares with the needed additional buffer ? I would
estimate the buffer size in 1,500 * 8 = 12,000 
flip-flops. Assuming 5-8 gates per flip-flop, 
this would amount to 60,000-100,000 gates.

Jaime

Jaime E. Kardontchik
Micro Linear
San Jose, CA 95131
email: kardontchik.jaime@xxxxxxxxxxx