RE: 1000BASE-T PCS question

[pbottorf@xxxxxxxxxxxxxxxxxx (Paul Bottorff)]

Ed:

Though it is true that BellCore standards written before OC-192 specify a
BER of 10^-10 the OC-192 SONET (~10 Gig) specification is for a BER of
10^-12. Please refer to:

GR-1377-CORE: SONET OC-192 Transport System Generic Criteria
Section 4.2.1, page 4-3

"All parameter values specified are worst-case, end-of-life values and
are to be met over the range of operating conditions described in
Section 7 of GR-253-CORE, with the exception of the follwoing: the
parameters are specified relative to an optical system design objective
of a BER not worse than 1E-12 for the extreme case of optical path
attenuation and dispersion conditions for each application specified."

Infact, the equipment in production is much better than the BellCore
specification with production error rate as low as 10^-15 making it far
better than current 8/10 encoding systems.

Paul


At 09:16 AM 5/27/99 -0400, Chang, Edward S wrote:
>
>Jami:
>
>We have been discussing scramble code versus block code, 8B/10B in
>particular, for a while on the reflector. Many people have the same feeling
>that scrambled code has run length much longer than desirable to cause
>base-line wander, and PLL clock drift; as a result, it can not meet the BER
>of 10^-12
>
>The SONET using scramble code has BER of 10^-10, which is not recommended
>for the datacom file transfer.  I believe the BER of 1000BASE-T is 10^-10,
>again, which is not recommended for file transfer.
>
>You can prove the BER is 10^-12 for the 4D symbol code to enable it to be
>used for all purposes, or stay at 10^-10 BER to be used, as 802.3ab, for
>less critical data handling. 
>
>Please clarify.
>
>Ed Chang
>Unisys Corporation
>Edward.Chang@xxxxxxxxxx
>      
>
>-----Original Message-----
>From: Jaime Kardontchik [mailto:kardontchik.jaime@xxxxxxxxxxx]
>Sent: Wednesday, May 26, 1999 9:48 PM
>To: rtaborek@xxxxxxxxxxxxxxxx
>Cc: Jaime Kardontchik; HSSG_reflector
>Subject: Re: 1000BASE-T PCS question
>
>
>
>Rich,
>
>For simplicity, I did not mention nor I did include in the
>figures that the 4D encoded symbols are randomized before
>sending them to the transmitters. This procedure is described
>in the 1000BASE-T standard.
>
>The produce assures that the output levels send down the
>wires (or the fiber) are DC balanced. However, you will not
>get the nice extremely short running disparity that one could
>get with the 8b/10b encoder, since the randomization is based
>on the scrambler. The scrambler used is 33 delays long (much
>longer than the scrambler used in Fast Ethernet) and it is
>expected to produce a better short term balance than the one
>obtained in Fast Ethernet.
>
>The clock can be recovered (in the same way as it is recovered in
>Fast Ethernet). Many simulations were run during the development
>of the 1000BASE-T standard and presented during its meetings
>showing that this is the case. There is already a well known
>company that has 1000BASE-T transceivers on Silicon, and
>has shown that they work in the last Interop gathering.
>
>Jaime
>
>Jaime E. Kardontchik
>Micro Linear
>San Jose, CA 95131
>email: kardontchik.jaime@xxxxxxxxxxx
>
>
>
>
>Rich Taborek wrote:
>
>> Jaime,
>>
>> I have a question about the 4D 8-state Trellis code used by 1000BASE-T
>> which I hope you may be able to answer:
>>
>> Is the 4D 8-state Trellis code A DC balanced code? If not, how difficult
>> will it be for the receiver to recover the clock?
>>
>> P.S. I believe that the usual procedure for presentations is to send
>> them to the chair or webmaster for placement on the IEEE web site. In
>> this case, that means sending a copy to Jonathan Thatcher or David Law.
>> (I would send it to both of them).
>>
>> --
>>
>> Jaime Kardontchik wrote:
>> >
>> > Jonathan,
>> >
>> > I sent a couple of hours ago the complete presentation on the
>> > "10G-BASE-T" approach in pdf format, but I did not get it back from the
>> > Reflector. The pdf file is not large (17 pages, about 70,000 bytes).
>> > Should I resend it ?
>> >
>> > Jaime
>> >
>> > Jaime E. Kardontchik
>> > Micro Linear
>> > San Jose, CA 95131
>> > email: kardontchik.jaime@xxxxxxxxxxx
>>
>> --
>>
>> Best Regards,
>> Rich
>>
>> -------------------------------------------------------------
>> Richard Taborek Sr.    Tel: 650 210 8800 x101 or 408 370 9233
>> Principal Architect         Fax: 650 940 1898 or 408 374 3645
>> Transcendata, Inc.           Email: rtaborek@xxxxxxxxxxxxxxxx
>> 1029 Corporation Way              http://www.transcendata.com
>> Palo Alto, CA 94303-4305    Alt email: rtaborek@xxxxxxxxxxxxx
>
>
Paul A. Bottorff, Director Switching Architecture
Bay Architecture Laboratory
Nortel Networks, Inc.
4401 Great America Parkway
Santa Clara, CA 95052-8185
Tel: 408 495 3365 Fax: 408 495 1299 ESN: 265 3365
email: pbottorf@xxxxxxxxxxxxxxxxxx