Re: Hari
Paul,
Boy this is taking a lot of cycles out of my MAS budget :-(
I'm still very confused about your notion of a Translator/Bridge/Relay required for Hari implementations. Let me try another illustration by comparing 10 GbE Hari to the serial output of the GbE Ten Bit Interface (TBI). Note that only the transmit direction is shown for simplicity.
1 GbE, PMA (SerDes) separate from PCS
-------------------------------------
TBI
+---------+ +---------+ +---------+
| +----------> | 1 serial | | Medium
| GbE PCS | 10 lines | GbE PMA +-----------> GbE PMD +---------->
| +----------> | 8B/10B | |
+---------+ 125 MHz +---------+ 1.25 Gbps +---------+
1 GbE, PMA integrated with PCS
-------------------------------------
+---------+ +---------+
| | 1 serial | | Medium
| GbE PCS +-----------> GbE PMD +---------->
| & PMA | 8B/10B | | 1 serial
+---------+ 1.25 Gbps +---------+
10 GbE, PMA integrated with PCS
-------------------------------
+---------+ Hari +---------+
| +----------> | Medium
| 10 GbE +----------> 10 GbE +------------>
| PCS/PMA +----------> PMD | 1-4 serial
| +----------> |
+---------+ 4 serial +---------+
8B/10B
3.125 Gbps
Several 10 GbE PMDs, like GbE support the propagation of the 8B/10B coding over the medium. These may include Parallel Optics, WWDM and 12.5 Gbps Serial. However, those are PMDs and Hari is an interface. Other 10 GbE PMDs strip off the 8B/10B code in the PMD and recode with more efficient codes. These include MAS, ~10 Gbps Serial LAN PHY and the WAN PHY.
I beg to differ about "corrupting" Ethernet layering to fit Hari in my previous note. No additional layers are added. I've simply added an optional coding and signaling function to the PMD sublayer and illustrated the optional serial interface (Hari) between the PMA and PMD sublayers.
The last point in your note argues that the 16 bit parallel interface is very different architecturally from Hari. I have shown above that this is clearly not the case. In addition, Hari has the distinct advantage of <1/4 the pins, drivers and receivers; longer trace lengths; no clock needed with the data; built in error control; DC balance; and special character support.
I have no problem with supporting the 16-bit parallel interface as an additional optional interface between the PMA and PMD if you feel that it's more appropriate for specific PMDs such as the WAN PHY.
Best regards,
Rich
--
Paul Bottorff wrote:
> Rich:
>
> We agree that Hari has qualities about it that make it desirable for a section of the market. We disagree that Hari is equivalent to a parallel PMD interface. I believe both these interfaces have their place. They are not mutually exclusive, they are complementary.
>
> As far as the architectural model, I'm just applying the 802.3 model exactly, rather than corrupting the layering to fit Hari. To make the model complete Hari can be viewed as performing peer dialog between 802.3 layers as follows. This helps explain the existence of the L1 Translator (or Bridge or Relay, choose your words) function which is currently required for Hari implementations. The jitter elimination buffer is part of the L1 Translator while deskew is part of the Hari-PCS. I believe this gives a much better understanding of how Hari behaves with respect to historic Ethernets. The peer model is consistent with all the functions currently presented for Hari. The model is as follows:
>
> 802.3 Peer Dialog
>
> ----------- ------------
> | MAC | - - - - - - - - - - - - - - - - - - - - - - - | MAC |
> |---------| ------------------------ |----------|
> | Recon | | L1 Trans(Bridge) | | Recon |
> |---------| |----------------------| |----------|
> |Hari-PCS | - - - - - | Hari-PCS | Other-PCS | - - - - - |Other-PCS |
> |---------| |----------|-----------| |----------|
> |Hari-PMA | - - - - - | Hari-PMA | Other-PMA | - - - - - |Other-PMA |
> |---------| |----------|-----------| |----------|
> |Hari-PMD | - - - - - | Hari-PMD | Other-PMD | - - - - - |Other-PMD |
> |---------| |----------|-----------| -----------|
> |______________________| |_________________________|
> 4 Wide Copper - 20" Fiber
>
> When this model is applied to a LAN PHY transform the Hari-PCS and Other-PCS are identical and therefore require no transform. When applied to a WAN PHY the Hari-PCS and the Other-PCS are different are require a transform. The model works nicely in both cases. Only the implementation changes.
>
> This model also makes it clear that the 16 bit parallel interface is very different architecturally from Hari. Hari is a complete PHY of its own while the 16 bit interface is a N-Layer boundary between PMA and PMD.
>
> Cheers,
>
> Paul
----------------------------------------------------------
Richard Taborek Sr. 1441 Walnut Dr. Campbell, CA 95008 USA
Tel: 408-330-0488 or 408-370-9233 Cell: 408-832-3957
Email: rtaborek@xxxxxxxxxx or rtaborek@xxxxxxxxxxxxx