Re: XAUI and 64b/66b
Tom,
You refer to a type of statistical info that the
PCS/SERDES chip sends to the MAC when RX_DV is in
the de-asserted state.
The proposal I described in many details in my
presentations and emails ("850nm-4WDM-1.25 Gbaud")
supports already the type of info you describe in
your email, since it uses the 1000BASE-T PCS: see,
"Receive State Diagram", Figure 40-10a, of the 802.3ab
Standard, specifically, the state in this figure named
"BAD SSD". The 1000BASE-T PCS, when it detects false
carrier events while in the RX_DV de-asserted state,
will set RX_ER=TRUE and RXD[7:0] = 0x0E. It will also
set rxerror_status = ERROR, which can be stored in an
internal register to be read by management through
the MDIO/MDC interface.
However, this type of info you describe in your email
- that my proposal already supports - is not
what Rich Taborek has in mind when he tries
to force the exchange of K28.0, K28.1, K28.2, K28.3
K28.4, K28.5, K28.6, K28.7 and K23.7 between the MAC
and the PCS/SERDES chips (both ways) through the
"XGMII" interface.
Jaime
Jaime E. Kardontchik
Micro Linear
San Jose, CA 95131
Tom Mathey wrote:
> Jaime,
>
> Actually, the "MAC" is required to accept MII signals during idle. I use the word "MAC" very loosly in this context,
> since we are actually dealing with the MII signals sent to the RS, and the associated service interfaces between
> the "MAC" and the MII and thus on up to higher layers. Both the MII and the GMII send signals to the RS
> while the Rx_DV is inactive. The signals sent are decoded for use as error signals, which are then used by network
> management. Many implementators consider the decode of such signals for use by the management variables to
> be part of the "MAC layer" resposibilities, even though these variables are not Clause 4 Pascal. Revelant paragraphs
> are copied below.
>
> 22.2.1 Mapping of MII signals to PLS service primitives and Station Management
> The Reconciliation sublayer maps the signals provided at the MII to the PLS service primitives defined in
> Clause 6. The PLS service primitives provided by the Reconciliation sublayer behave in exactly the same
> manner as defined in Clause 6. The MII signals are defined in detail in 22.2.2 below.
>
> 22.2.2.8 RX_ER (receive error)
>
> While RX_DV is de-asserted, the PHY may provide a False Carrier indication by asserting the RX_ER signal
> for at least one cycle of the RX_CLK while driving the appropriate value onto RXD<3:0>, as defined in
> 22.2.2.7. See 24.2.4.4.2 for a description of the conditions under which a PHY will provide a False Carrier
> indication.
>
> 35.2.2.8 RX_ER (receive error)
>
> While RX_DV is de-asserted, the PHY may provide a False Carrier indication by asserting the RX_ER signal
> for at least one cycle of the RX_CLK while driving the appropriate value onto RXD<7:0>, as defined in
> 35.2.2.8. See 36.2.5.2.3 for a description of the conditions under which a PHY will provide a False Carrier
> indication. Figure 35-12 shows the behavior of RX_ER, RX_DV and RXD<7:0> during a False Carrier indication.
>
> 30.5.1.1.10 aFalseCarriers
> BEHAVIOUR DEFINED AS:
> A count of the number of false carrier events during IDLE in 100BASE-X and 1000BASE-X links.
>
> Tom Mathey
> <tmathey@xxxxxxxxxxxxxx>
>
> original text
> ----------------------------------------------------------------------------------------
> Jaime E. Kardontchik
> Date: Mon, 27 Mar 2000 13:49:53 -0800
> ----------------------------------------------------------------------------------------
> In the MII and GMII the MAC and PCS/SERDES ignore
> what is signaled at TXD[7:0] and RXD[7:0] when TX_EN
> and RX_DV are deasserted, respectively. In other words,
> the MAC does not send/receive relevant information during
> the "IDLE" periods.
> ----------------------------------------------------------------------------------------