Quick 64b/66b question
Hi Birdy,
I have a quick question I was hoping you could answer.
For synchronization purposes, two conditions must be met - frame_lock &
hi_ber = false. The first ensures that a candidate postion for the 2-bit
preamble is a valid one (64 valid Sync-Words in a row - i.e.: 01 or 10).
The second ensures that there is a minimum quality of BER on the link
(10^-4). Both are required to go into sync. So, my question is:
Why is hi_ber set to false on reset or power_on? wouldn't this allow for
a possibility where synchronization is established quickly, but a high
BER might be present (and only after 125us or ~20000 64/66 frames will
sync_done be false again)? It would seem that reset condition could be
counter-intuitive to the intent I had originally envisioned. Please let
me know if I'm way off on this one. Thanks.
-Dave