RE: Clause 51 (XSBI) LVDS spec
Hi All,
In the OIF 10 Gbit/s Interfcace 16-bit LVDS at 622 Mhz, Differential
input impedance is defined as +/- 20 % of 100 Ohm.
The Best case would be for IEEE 802.3 ae to refer IEEE general purpose link
for LVDS Dc parameters . Differential Input impedance,AC Parameter may be
refered to OIF 16-bit LVDS at 622 Mhz ( for WAN application).
Thanks
PankaJ
INTEL Corporation
-----Origial Message-----
From: Ed Grivna [mailto:elg@xxxxxxxxxxx]
Sent: Saturday, October 21, 2000 9:35 AM
To: Jscquake@xxxxxxx; tord.haulin@xxxxxxxxxxxxx
Cc: stds-802-3-hssg@xxxxxxxx
Subject: Re: Clause 51 (XSBI) LVDS spec
Hi all,
We need to be extreemly careful when referencing things like LVDS.
The term means many things to many people. While Justin is correct
that IEEE 1596.3-1996 is the IEEE reference for LVDS, I don't
know if the LVDS specs present in this standard are sufficient
for the signaling speeds being discussed or suggested here.
IEEE 1596.3-1996 sets a maximum signaling rate spec of 200 Mbits/second
on the signaling, and a +/-10 Ohm limit on the 100 Ohm termination
impedance. Because of the faster signaling that used here, it may be
advantageous to reference the TIA/EIA-644 LVDS specification. This
one has a recommended top-end of 655 Mbits/second, and allows termination
impedances from 90-132 Ohms (an easier range to hit for on-chip
resistors).
Regards
> Justin Chang:
> The IEEE 1596.3 LVDS spec has a few parameter specifications that very
> many LVDS circuits do not follow in detail, e.g. the unloaded common mode
> output voltage tolerance of 1200mV +/-75mV.
>
> Can the electrical specs in clause 51 referring to IEEE 1596.3 be assumed
> to
> also inherit the generally accepted deviations?
>
> Best regards
> Tord Haulin
>
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