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Re: XGMII New ElectricalI Characteristics




Yongbum,

I thought the XGMII clocking issue was settled by motion to revert back
to Source Centered timing as described in P802.3ae draft 1.0. I
understand that there still may be debate, but if settled by motion, it
would take 75% to change what will be written into D2.0. I don't have
the actual motion, so could someone (Jeff Warren?) please settle this
issue.

Best Regards,
Rich
   
--

Yongbum Kim wrote:
> 
> The group formally voted for HSTL 1.5V for XGMII Class 1 and suitably
> compatible low-voltage (but not *decided* as HSTL class 1) MDIO.  The
> Source Simultaneous versus Source Centered timing is still under debate,
> but it is still written as source centered timing.
> 
> Yong.
> ======================================================
> Yongbum "Yong" Kim                  (408)570-0888 x141
> Chief Technical Officer             (408)570-0880  fax
> Allayer Communications               ybkim@xxxxxxxxxxx
> 107 Bonaventura Drive           http://www.allayer.com
> San Jose, CA 95134
> ==This Message is forwarded by RoX Switch at 1 Gb/s.==
> 
> -----Original Message-----
> From:   James Colin [SMTP:james_colin_j@xxxxxxxxx]
> Sent:   Monday, November 13, 2000 5:05 AM
> To:     stds-802-3-hssg@xxxxxxxx
> Cc:     James_Colin_J@xxxxxxxxx
> Subject:        XGMII New Electrical Characteristics
> 
> Hello There,
> Can someone update me in regards to XGMII electrical
> characteristics? Did it went back to SSTL_2 levels or
> HSTL 1.5v or anything else?
> 
> Thanks,
> James
                                   
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Richard Taborek Sr.                 Phone: 408-845-6102       
Chief Technology Officer             Cell: 408-832-3957
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