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Hi, Robin, I think
you are referring to the 64B/66B PCS (Clause 49) and not the WIS
(Clause 50). The WIS doesn’t have any of the functionality you are
referring to (such as a Receive state machine). Is this right? You might want
to clarify this. Best
regards, - Tom -----Original
Message----- HSSG, I'm violating the first law of reflectors
here by asking a question before listening for a while, but the deadline, an
unsuccessful search of the archive, and my confusion have forced the
issue. I apologize if I offend. The first question is about the Local
Fault ordered set when using a WIS (clause 49). The Link Fault
Signaling state machine in the RS (clause 46) responds to received Local Fault
ordered sets, but I cannot see where these are generated when using a
WIS. The far end RS doesn't seem to transmit a Local Fault ordered set
(p.266), and I don't see anything in the WIS that would put it on the receive
path. Error blocks are generated, according to the WIS Receive state
machine, but not ordered sets. Could someone point me in the right
direction? The second question concerns error
blocks. The WIS defines EBLOCK_R as having /E/ in all 8 character
locations, but the PCS shows figure 46-8 Reception with error as a single byte
of /E/ surrounded by frame data. Is this simply an old figure 46-8? Thank you, |