Re: Clause 45: MDIO Electrical Specifications

[Nafea Bishara <nafea@xxxxxxxxxxxxx>]

Hi Rick

it is assumed that most systems will have a 1.5V supply because of the HSTL drivers ( XGMII  or other HSTL interfaces like SRAMs and SPI-4 buses)

in any case, any design done today will be in 0.18u geometry or smaller, thus, u sure will have a 1.8V or lower supply on board

    regards
        -nafea
"Rabinovich, Rick" wrote:

 

To All,

Table 45-41 indicates a maximum VIH = 1.5V. Why is it so restrictive?

I suggest that the inputs should be resilient to LVTTL levels (3.3V Nominal), otherwise system manufacturers will be forced to provide additional voltages and logic to support a 2-wire management bus.

Cordially,

Rick Rabinovich
Hardware Group Lead Engineer
System Architect
Spirent Communications
26750 Agoura Road
Calabasas, CA 91302
Phone: 818-676-2476
Fax    : 818-880-9293
Email: rick.rabinovich@xxxxxxxxxxxxxx
 

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