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Rick, I support your effort to bring forward these potential issues to the group at large. I also encourage further reflector discussion if people feel there is something broken in the draft. It is important that we make the correct decisions when these items come up for vote at the meeting. I was not sure if you were at the meeting and wanted to explain some of the background thinking that had gone on 'off the reflector' during the ad-hoc and at the Irvine meeting. I also encourage any of you who are attending the meeting and have points to raise on the MDIO electrical interface to come along to the Clause 45 sub track so that we can hear your concerns when we discuss the electrical interface comments. Regards Ed "Rabinovich, Rick" <rick.rabinovich@xxxxxxxxxxxxxx> on 28/02/2001 18:32:39 Sent by: "Rabinovich, Rick" <rick.rabinovich@xxxxxxxxxxxxxx> To: Edward Turner/GB/3Com@3Com cc: stds-802-3-hssg@xxxxxxxx Subject: RE: Clause 45: MDIO Electrical Specifications Hi Ed, I attended the last meeting in Irvine when this subject was discussed and I understand the reasoning behind it. I used this forum to have more visibility on a subject that can cause grievance to system manufacturers today. Furthermore, I agree with some of the feedback so far, that the bus should be at least 1.8V resilient. Cordially, Rick Rabinovich -----Original Message----- From: Edward Turner [mailto:Edward_Turner@xxxxxxxxxxxx] Sent: Wednesday, February 28, 2001 2:01 AM To: stds-802-3-hssg@xxxxxxxx Subject: Re: Clause 45: MDIO Electrical Specifications Rick, The important thing to bear in mind when reviewing the MDIO electrical interface is that we are probably going to be using it for the next ten years or so. This was the main consideration during our discussions in the ad-hoc up to the January meeting, and at the meeting itself. Even in today's technologies a 3v3 tolerance for a 1v5 signal could strain the input protection diode clamps. As we move to smaller processes and voltages, 3v3 tolerance would become even more of a burden for the IC vendors to support. With that in mind, people have suggested that we actually adopt an even lower voltage for the interface. The selected voltage was seen as a fair compromise between today's processes and tomorrow's. One of the comments I received on D2.1 was on the electical interface so this issue will be up for discussion at the next meeting On another point, the selection of the MDIO electrical interface should be regarded as orthogonal to the selection of the XGMII electrical interface. If the MDIO uses the same voltages as the XGMII then we are lucky, but the MDIO will be around a lot longer than the XGMII so we should not let the XGMII electrical specification influence the MDIO electrical specification. Regards, Ed Clause 45 editor. "Rabinovich, Rick" <rick.rabinovich@xxxxxxxxxxxxxx> on 27/02/2001 18:20:59 Sent by: "Rabinovich, Rick" <rick.rabinovich@xxxxxxxxxxxxxx> To: stds-802-3-hssg@xxxxxxxx cc: (Edward Turner/GB/3Com) Subject: Clause 45: MDIO Electrical Specifications To All, Table 45-41 indicates a maximum VIH = 1.5V. Why is it so restrictive? I suggest that the inputs should be resilient to LVTTL levels (3.3V Nominal), otherwise system manufacturers will be forced to provide additional voltages and logic to support a 2-wire management bus. Cordially, Rick Rabinovich Hardware Group Lead Engineer System Architect Spirent Communications 26750 Agoura Road Calabasas, CA 91302 Phone: 818-676-2476 Fax : 818-880-9293 Email: rick.rabinovich@xxxxxxxxxxxxxxTitle: RE: Clause 45: MDIO Electrical Specifications
Hi Ed,
I attended the last meeting in Irvine when this subject was discussed and I understand the reasoning behind it.
I used this forum to have more visibility on a subject that can cause grievance to system manufacturers today. Furthermore, I agree with some of the feedback so far, that the bus should be at least 1.8V resilient.
Cordially,
Rick Rabinovich
-----Original Message-----
From: Edward Turner [mailto:Edward_Turner@xxxxxxxxxxxx]
Sent: Wednesday, February 28, 2001 2:01 AM
To: stds-802-3-hssg@xxxxxxxx
Subject: Re: Clause 45: MDIO Electrical Specifications
Rick,
The important thing to bear in mind when reviewing the MDIO electrical interface
is that we are probably going to be using it for the next ten years or so. This
was the main consideration during our discussions in the ad-hoc up to the
January meeting, and at the meeting itself.
Even in today's technologies a 3v3 tolerance for a 1v5 signal could strain the
input protection diode clamps. As we move to smaller processes and voltages,
3v3 tolerance would become even more of a burden for the IC vendors to support.
With that in mind, people have suggested that we actually adopt an even lower
voltage for the interface. The selected voltage was seen as a fair compromise
between today's processes and tomorrow's.
One of the comments I received on D2.1 was on the electical interface so this
issue will be up for discussion at the next meeting
On another point, the selection of the MDIO electrical interface should be
regarded as orthogonal to the selection of the XGMII electrical interface. If
the MDIO uses the same voltages as the XGMII then we are lucky, but the MDIO
will be around a lot longer than the XGMII so we should not let the XGMII
electrical specification influence the MDIO electrical specification.
Regards,
Ed
Clause 45 editor.
"Rabinovich, Rick" <rick.rabinovich@xxxxxxxxxxxxxx> on 27/02/2001 18:20:59
Sent by: "Rabinovich, Rick" <rick.rabinovich@xxxxxxxxxxxxxx>
To: stds-802-3-hssg@xxxxxxxx
cc: (Edward Turner/GB/3Com)
Subject: Clause 45: MDIO Electrical Specifications
To All,
Table 45-41 indicates a maximum VIH = 1.5V. Why is it so restrictive?
I suggest that the inputs should be resilient to LVTTL levels (3.3V
Nominal), otherwise system manufacturers will be forced to provide
additional voltages and logic to support a 2-wire management bus.
Cordially,
Rick Rabinovich
Hardware Group Lead Engineer
System Architect
Spirent Communications
26750 Agoura Road
Calabasas, CA 91302
Phone: 818-676-2476
Fax : 818-880-9293
Email: rick.rabinovich@xxxxxxxxxxxxxx