RE: [802.3ae] 10 Gig XGMII

["Grow, Bob" <bob.grow@xxxxxxxxx>]

Title: 10 Gig XGMII

Your now in the domain of a specific implementation, not the 802.3ae draft.  You will need to talk to the vendor of the product in question.  The draft is very clear that there are no requirements of phase or frequency between RXCLK and TXCLK (other than general clock tolerances, therefore there can be no assumption of phase or frequency compatibility between RXCLK and TXD/TXC.

 

--Bob

-----Original Message-----
From: Manish Agrawal [mailto:agrawal.manish@xxxxxxxxx]
Sent: Sunday, July 22, 2001 11:56 PM
To: Grow Bob; 'Alon Lamensdorf'; stds-802-3-hssg@xxxxxxxx
Subject: RE: [802.3ae] 10 Gig XGMII

Hello Bob,

 

If we loopback TXCLK to RXCLK, some gate appears in the receiver clock path. Then it becomes difficult to met setup and hold time.  Also its not a wise decision to use the gated clock. Don't we have any other solution of it?

 

Can't we use the same RXCLK (not TXCLK loopbacked) and double synchronize all the loopbacked data with the RXCLK?

 

 

Best Regards,

Manish

-----Original Message-----
From: owner-stds-802-3-hssg@xxxxxxxxxxxxxxxxxx [mailto:owner-stds-802-3-hssg@xxxxxxxxxxxxxxxxxx]On Behalf Of Grow, Bob
Sent: Friday, July 20, 2001 3:10 AM
To: 'Alon Lamensdorf'; 'stds-802-3-hssg@xxxxxxxx'
Subject: RE: [802.3ae] 10 Gig XGMII

If the implementation is to the current spec, the TX side can logically be connected to the RX side and data should be looped back.  If your purpose is to validate the XGMII implementation, it won't do a very good job (no testing of the link fault state machine, error handling, etc.) 

 

The connection is straight forward:  TXD<0> to RXD<0> ..., TXC<0> to RXC<0>..., and  TXCLK to RXCLK. 

 

Obviously, you will need to assure that when you loop the signals back that setup and hold times are met. 

 

 

Bob Grow

-----Original Message-----
From: Alon Lamensdorf [mailto:ALamensd@xxxxxxxxx]
Sent: Thursday, July 19, 2001 5:30 AM
To: 'stds-802-3-hssg@xxxxxxxx'
Subject: [802.3ae] 10 Gig XGMII

Hi,

I am working with a 10 Gig Net Processor that got an XGMII interface.
I would like to know if I can connect the RX port to the TX port  in the XGMII interface ( to perform a loop).
In case the answer is yes, can u advise me about the proper way to do it?
Regards.

=========================================

 Alon Lamensdorf          
 R&D hardware engineer
 AVAYA communications
 eMail: alamensd@xxxxxxxxx 
 http://www.avaya.com
 Phone: +972-3-6457530 
 Fax:     +972-3-6487146

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