RE: [802.3ae] ethernet CRC
Thanks for pointing out the errors.
Rahul.
-----Original Message-----
From: owner-stds-802-3-hssg@xxxxxxxxxxxxxxxxxx
[mailto:owner-stds-802-3-hssg@xxxxxxxxxxxxxxxxxx]On Behalf Of
pat_thaler@xxxxxxxxxxx
Sent: Monday, April 01, 2002 4:17 PM
To: rahul.bhushan@xxxxxx; Giacomo.Accattoli@xxxxxxxxxx;
stds-802-3-hssg@xxxxxxxx
Subject: RE: [802.3ae] ethernet CRC
Rahul,
Your answer is incorrect on multiple points. Starting with all zeros in the
CRC doesn't lock anything up. If during the CRC calculation the CRC register
gets to all zeros, one just lets that state be. If you altered the state,
you would generate an incorrect CRC value.
To generate CRCs that are interoperable, one must implement a CRC generator
that produces the same result as the algorithm defined in 3.2.8 of IEEE
802.3. Mathematically, this algorithm starts by complementing the first 32
bits of the frame.
There are two kinds of circuits that commonly appear in literature on
implementing CRC generators. One does a simultaneous multiply of the data
stream by x^32 and divide by the CRC polynomial (call this circuit SMD for
simultaineous multiply and divide). For SMD, intializing the CRC register to
all ones produces the same result as complementing the first 32 bits of the
frame. This is the more common of the two implementations. The other does
the divide but not the multiply (called D). For D, intializing the CRC
register to all ones does not produce the same result as complementing the
first 32 bits of the data.
Therefore, one can only advise initializing the register to all ones as an
alternative to complementing the initial 32 bits of the message when one
know that the implementation uses the SMD circuit.
For those who wish more detail, I suggest you read the paper written by my
colleague, Vincente Cavanna, and Luben Tuikove to help the IETF iSCSI crew
understand the CRC at:
http://www.haifa.il.ibm.com/satran/ips/Vince-Luben-crc32c.pdf
Regards,
Pat
-----Original Message-----
From: Rahul Bhushan [mailto:rahul.bhushan@xxxxxx]
Sent: Tuesday, March 26, 2002 12:11 PM
To: Giacomo.Accattoli@xxxxxxxxxx; stds-802-3-hssg@xxxxxxxx
Subject: RE: [802.3ae] ethernet CRC
Hi,
You can start with all zeroes however u will lock
yourself out so it is prudent to start all FFs with
ones at reset AND to have a all-zero
detection-prevention circuit.
Rahul.
-----Original Message-----
From: owner-stds-802-3-hssg@xxxxxxxxxxxxxxxxxx
[mailto:owner-stds-802-3-hssg@xxxxxxxxxxxxxxxxxx]On Behalf Of
Giacomo.Accattoli@xxxxxxxxxx
Sent: Tuesday, March 26, 2002 9:05 AM
To: stds-802-3-hssg@xxxxxxxx
Subject: [802.3ae] ethernet CRC
Hallo,
Some items for CRC calculation are not clear for me.
What's the initial state for the computation (all 0s, all 1s or other)?
Can I have a numerical example of Ethernet CRC-32 calculation, please?
Best regards,
Giacomo