Re: Receiver synchronization
Dear Vipul,
> What would be the equivalent of "comma detect" in a 64B66B based link? How
> would a receiver, upon receiving a serial bit stream encoded with 64B66B
> code, know where the boundary of a 64-bit block is? Assume a Serial PMD
> operating at 10.3 GHz and a bit-deserializer. I will also appreciate some
> comments on the complexity of implementing this synchronization, relative
> to a link based on 8B10B transmission code.
The synchronization is fairly simple. Just look for the periodic
transition in the two sync bits that preface each 64 bit data field.
Since the data field is scrambled, there will be no region with a
consistent transition except for at the transition between the
complementary sync bits.
So, you simply pick a 66 bit boundary and look for the presence of a "01" or
"10" pattern. If you don't detect a stable transition in a given period
of time (of course allowing for some bit errors), then you bit-slip your
frame decode circuit and try again. The worst case sync time is 66 slips,
and the expected time is 33 slips.
This is essentially the identical state machine used by SONET, except that
SONET looks for two sync bytes rather than two sync bits.
We will eventually publish a state machine definition that will describe
the statistical qualification techniques to make this frame sync circuit
quite robust in the presence of bit errors.
In comparison to 8B/10B, this is perhaps an even simpler circuit since
it looks for only recurring 2-bit patterns rather than 10-bit comma
patterns.
Best regards,
--
Rick Walker