RE: SJTP:Phantom sync headers
Ben,
That was an advantage of the proposal for the receiver to look for a pattern
in the descrambler and load the seed based on reaching that pattern.
Once block sync has been acquired and data starts running into the
descrambler, there will only be errors after each seed change. Once 58 bits
have been received with the new seed, the descrambler will have locked. So,
at any time other than the block immediatly after a seed change (or the
block after a transmission error), the scrambler and descrambler states will
be synced.
What we have to provide is a way to sync the scrambler load at the receiver.
One way we could do that is to load a value into the receiver that is the
scrambler state right before the loading of Seed A. When the scrambler state
reaches that value, Seed A will be loaded and from there on the timer takes
over. If this method is used, one will need to check the patterns to ensure
that that value doesn't appear in the scrabler at any other point during the
test.
The other cruder method is to not try to sync the receiver scrambler at all.
One knows that then one will get 4 errored blocks per every repeat of the
pattern. Run a counter in the receiver at the seed load rate and don't count
the first error in each seed load time. (This assumes we count errored
blocks rather than errored bits. If one counts errored bits, it gets more
complicated because the number of those will depend on the particular
pattern sent.)
Regards,
Pat
-----Original Message-----
From: Ben Brown [mailto:bbrown@amcc.com]
Sent: Thursday, May 10, 2001 4:48 PM
To: Alderrou Don
Cc: serialpmd
Subject: Re: SJTP:Phantom sync headers
Don,
This is a good point. Especially with such a short
pattern, it may be difficult for the receiver to
power up "knowing" where it is in the
Seed A
Seed A Invert
Seed B
Seed B Invert
loop. There may be many errors in the beginning while
waiting to sync up on the pattern... As we develop
seeds, this is another aspect of the project that
could greatly benefit from PCS simulations.
Ben
"Alderrou, Don" wrote:
>
> Ben,
>
> Another issue which I've not heard discussed is in the receiver error
> detection logic. Once the 64B/66B receiver has Block_Lock, the error
> detection logic needs to find "pattern sync" at the beginning of the
jitter
> test pattern. The pattern as proposed will invert the data & scrambler
> seed, thus the receiver needs to also do this at the proper time to check
> for errors. If the data & seed are not chosen wisely, there could be
> similar "phantom pattern sync" issues. A simple way around this is to
have
> some "sync frames" similar to the WAN A1/A2 as part of the pattern.
>
> --Don
>
> > -----Original Message-----
> > From: Ben Brown [mailto:bbrown@amcc.com]
> > Sent: Thursday, May 10, 2001 9:59 AM
> > To: serialpmd
> > Subject: SJTP:Phantom sync headers
> >
> >
> >
> > All,
> >
> > Jonathan brought up an interesting point that I have
> > elaborated upon below. Those who have begun or are
> > interested in beginning to search for patterns should
> > probably keep this in mind.
> >
> > Ben
> >
> > --
> > -----------------------------------------
> > Benjamin Brown
> > AMCC
> > 2 Commerce Park West
> > Suite 104
> > Bedford NH 03110
> > 603-641-9837 - Work
> > 603-491-0296 - Cell
> > 603-626-7455 - Fax
> > 603-798-4115 - Home Office
> > bbrown@amcc.com
> > -----------------------------------------
> >
--
-----------------------------------------
Benjamin Brown
AMCC
2 Commerce Park West
Suite 104
Bedford NH 03110
603-641-9837 - Work
603-491-0296 - Cell
603-626-7455 - Fax
603-798-4115 - Home Office
bbrown@amcc.com
-----------------------------------------