Thread Links Date Links
Thread Prev Thread Next Thread Index Date Prev Date Next Date Index

[802.3ae_Serial] RE: CRPAT / CJPAT Pattern Question




I think someone also needs to verify that both disparities of the patterns
provide the desired spectral characateristics since we do not control
disparity and the disparity flipped pattern is a different pattern than the
original CJPAT.
 
Pat
 
 
-----Original Message-----
From: Lindsay, Tom [mailto:tlindsay@stratoslightwave.com]
Sent: Saturday, June 23, 2001 3:58 PM
To: DAmbrosia, John F; Mike Jenkins
Cc: stds-802-3-hssg-serialpmd@ieee.org
Subject: RE: CRPAT / CJPAT Pattern Question


This thread never really completed, so here is the suggested remedy I am
submitting with my letter ballot:

Time-stagger the payload portion of the patterns in the lanes. I propose the
staggering for CJPAT be such that lanes 0 & 2 remain as they are, but lanes
1 & 3 rotate 140 bytes each. This will retain the special properties of this
pattern within each lane.
 
I suggest CRPAT be rotated 3 bytes (~90 degrees per repetition) per lane,
although I have another comment that suggests CRPAT has other potentially
serious issues, and this change may cause worse problems.

 
I THINK this addresses the thread, but I expect others will correct me as
appropriate. The suggested remedy does NOT invert the data (this is not
possible with 8B10B), but does attempt to provide a compromised "mixing" of
edges and frequencies.
 
*****
 
The "other" comment about CRPAT is
CRPAT may not meet its objectives of randomness unless disparity is
controlled (on each lane) as is done in Fibre Channel. However, this may not
be important, since this pattern is not referenced by other sections of the
standard.
 
The suggested remedy is
Option A: Delete section 48A.4.
Option B: Build up the pattern like CJPAT is where both disparities of the
pattern will exist, assuring that one is always correct. This would take a
few hours of effort.
Option C: Convince me that disparity is controlled such that the payload
portion starts positive.
Option D: Add a statement "The intended spectral density of this pattern may
not be achieved unless the ending running disparity of START/PREAMBLE/SFD is
controlled to be positive.
If option B, C, or D is chosen, then also add a note explaining that "this
pattern is not intended for compliance testing, but it may useful for
unspecified diagnostic purposes."

*****
 
Tom Lindsay
Stratos


-----Original Message----- 
From: DAmbrosia, John F 
Sent: Fri 6/15/2001 9:51 AM 
To: Lindsay, Tom; Mike Jenkins 
Cc: stds-802-3-hssg-serialpmd@ieee.org 
Subject: RE: CRPAT / CJPAT Pattern Question



Tom,
Slipping by any number of bits would be preferrable.
i am thinking about any type of testing that would use the CJPAT or CRPAT.
You could have this type of phenomenon happen on board level testing.

John

-----Original Message-----
From: Lindsay, Tom [ mailto:tlindsay@stratoslightwave.com
<mailto:tlindsay@stratoslightwave.com> ]
Sent: Friday, June 15, 2001 12:21 PM
To: DAmbrosia, John F; Mike Jenkins
Cc: stds-802-3-hssg-serialpmd@ieee.org
Subject: RE: CRPAT / CJPAT Pattern Question


John -

I just sent a note before I saw this.

Given the restrictions of 8B10B, slipping the pattern by a bit is not
possible. It could easily be slipped by as little as 1 byte (10 bits),
but without disparity control, you may still not get the same serial
pattern.

A basic question - are you thinking of a board level test or a system
compliance test?

Tom

-----Original Message-----
From: DAmbrosia, John F [ mailto:john.dambrosia@tycoelectronics.com
<mailto:john.dambrosia@tycoelectronics.com> ]
Sent: Friday, June 15, 2001 8:35 AM
To: 'Mike Jenkins'
Cc: stds-802-3-hssg-serialpmd@ieee.org
Subject: RE: CRPAT / CJPAT Pattern Question



Everyone,
THere are multiple issues here, so let me try to go through it again.  I
think we may be at a point where it is really an "implication " thing
that
we can only try to inform about.

I would like to refer everyone to the presentation that was given in St.
Louis -

http://grouper.ieee.org/groups/802/3/ae/public/may01/dambrosia_2_0501.pd
<http://grouper.ieee.org/groups/802/3/ae/public/may01/dambrosia_2_0501.pd> 
f

There are two aspects to the crosstalk analysis.  The first part looked
at
the noise values (both near and far-end)created in the HM-Zd connector.
During this analysis worst-case switching patterns, intended to maximize
the
amount of crosstalk, were used.  You can see, how the worst case
switching
would be dependent on the connector pinout.

In the second part of the presentation, we ran a system simulation of
the
XAUI channel.  We used one pinout and either switched signals in phase
or
out of phase with the signal under consideration.  When adjacent signals
are
switched in-phase, the overall performance of the system was better than
when no adjacent signals were switched or when they were switched out of
phase. In our simulation we assumed a bottom layer connection (i.e.
traces
go through the via to the bottom layer).  When assuming a top layer
connection, this affect is even more dramatic.

So it was my concern that crosstalk between the 4 lanes in a single
channel
would result in  artifically improved performance, which would improve
overall measured performance in a system environment where other
crosstalk
sources are then be factored in.

Perhaps another suggestion is to use the same data pattern for each
lane,
but delay each by a bit?  We can leverage off of CRPAT and CJPAT, which
were
intended to test jitter, and include potential crosstalk effects.  I
don't
think a PRBS pattern will stress the jitter performance, since this is
what
CJPAT is intended to do, right?

John

-----Original Message-----
From: Mike Jenkins [ mailto:jenkins@lsil.com <mailto:jenkins@lsil.com> ]
Sent: Thursday, June 14, 2001 10:19 PM
Cc: stds-802-3-hssg-serialpmd@ieee.org
Subject: Re: CRPAT / CJPAT Pattern Question



All,

I want to step back a second to point out what this conversation
is aimed at.  Changing the pattern on three lanes to see the effect
at the receiver of the 4th lane is manipulating far-end crosstalk
(FEXT).  FEXT is much smaller than near-end crosstalk (NEXT) because
the inductive and capacitive components subtract in FEXT but add
in NEXT.  The NEXT for a receiver is created by the transmitters
in the same device as the receiver under test.  If these transmitters
are sending CRPAT (or whatever) asynchronously, all possible
combinations will occur to close the receiver eye.  Extraordinary
efforts to manipulate FEXT are probably for relatively rather small
returns in additional eye closure.

Regards,
Mike

pat_thaler@agilent.com wrote:
>
> Michael,
>
> >From my experience testing crosstalk,  single frequency stimulus
signals
> would not be an effective way of testing crosstalk. Generally, the
received
> crosstalk from a disturber such as an adjacent signal path is the sum
of
> many crosstalk components each coupling in with its own phase. Because
of
> this, the crosstalk is not a smooth function with frequency. It
bounces
> around staying under an envelope where the envelope is the amplitude
you
get
> when all the components add in phase. Therefore, testing crosstalk at
a
few
> discrete frequencies doesn't tell you much about where the envelope
lies.
>
> Generally one wants to test crosstalk with a signal containing a broad
> spectrum of frequencies (e.g. CRPAT or even the normal idle signal
since
we
> designed that to spread energy across the spectrum). One of the
reasons
put
> forth in favor of having individual lane disables was that one could
test
> crosstalk from one lane by disabling the other transmitters.
Therefore, we
> don't need to do any special patterns for crosstalk measurement.
>
> Pat
>
> -----Original Message-----
> From: Michael Debie [ mailto:mdebie@wavecrest.com
<mailto:mdebie@wavecrest.com> ]
> Sent: Thursday, June 14, 2001 9:47 AM
> To: 'DAmbrosia, John F'; Michael Debie; 'Serial PMD reflector
(E-mail)'
> Subject: RE: CRPAT / CJPAT Pattern Question
>
> John,
>
> Absolutely agree.  I was just simplifying my description to one lane,
but,
I
> assumed we would test each lane individually.  As far as the pattern
> selection is concerned, the use of different patterns on each lane
allows
us
> to see the contribution each of the other lanes has on cross talk
noise.
> For example, suppose Lane 1 was driving a /5 clock like pattern
(1111100000)
> the FFT of the jitter on the Lane under test would show a spectral
line at
> Fc/10 and the amplitude of the spectral line would be the pk-pk impact
on
DJ
> that Lane 1 has on the Lane Under Test (LUT?). We could set up the
other 3
> lanes with varying degrees of clock like patterns and quickly estimate
each
> lanes contribution to crosstalk on the LUT.  We could perform this
test on
> all 4 lanes to measure crosstalk contribution.  It would also be
interesting
> to sweep through several clock like frequencies on the non tested
lanes to
> quantify the impact of crosstalk as a function of instantaneous
frequency.
> The test in which we apply the same pattern on all of the non tested
lanes
> will tell us how the crosstalk components combine.
>
> Regards,
> Michael
> -----Original Message-----
> From: DAmbrosia, John F [ mailto:john.dambrosia@tycoelectronics.com
<mailto:john.dambrosia@tycoelectronics.com> ]
> Sent: Thursday, June 14, 2001 9:11 AM
> To: 'Michael Debie'; 'Serial PMD reflector (E-mail)'
> Subject: RE: CRPAT / CJPAT Pattern Question
>
> Michael,
> I think your second proposal makes more sense, but i think it would
need
to
> go one step further.  I think we should cycle which lane is the
"different"
> lane like this-
>
>                 Pat 1A  Pat 1B  Pat 1C  Pat 1D
> Lane A  +               -               -               -
> Lane B  -               +               -               -
> Lane C  -               -               +               -
> Lane D  -               -               -               +
>
> Where the "+" lane would be the pattern, and the "-" would be the
> compliment.  Thus, all channels get examined.  If only 1 lane is
tested,
> then the test is specific to the implemenation, where if all lanes in
a
> channel get examined, then the performance of the channel is fully
examined
> rather than 1/4 of it.
>
> John
>
> -----Original Message-----
> From: Michael Debie [ mailto:mdebie@wavecrest.com
<mailto:mdebie@wavecrest.com> ]
> Sent: Wednesday, June 13, 2001 5:41 PM
> To: DAmbrosia, John F
> Subject: RE: CRPAT / CJPAT Pattern Question
>
> John,
>
> A good diagnostic for cross talk would be to place different frequency
clock
> like patterns on all of the lanes.  This could tell us the amplitude
of
> cross talk per other lane and where it comes from.  Also, if we run
the
same
> patterns on three lanes and one lane different, we could see how the
other
> three lanes combine to effect cross talk on the lane under test.
>
> Regards,
> m
>
> -----Original Message-----
> From: DAmbrosia, John F [ mailto:john.dambrosia@tycoelectronics.com
<mailto:john.dambrosia@tycoelectronics.com> ]
> Sent: Wednesday, June 13, 2001 4:21 PM
> To: Serial PMD reflector (E-mail)
> Subject: CRPAT / CJPAT Pattern Question
>
> Everyone,
> The 10GEA XAUI Interoperability Group met this week, and were
discussing
the
> use of the CRPAT / CJPAT patterns for its testing.  A general
observation
> was that the same data pattern appear on all 4 lanes synchronously,
which
> means crosstalk is not really being testing, which was probably being
> accounted for by connector crosstalk budget of 4%.  Tyco presented
data
>
http://grouper.ieee.org/groups/802/3/ae/public/may01/dambrosia_2_0501.pd
<http://grouper.ieee.org/groups/802/3/ae/public/may01/dambrosia_2_0501.pd> 
f
> that showed that crosstalk, which resulted from signals switching
in-phase
> (i.e. high to low or low to high), could actually improve the overall
> response of the system.  Thus, the resultant eye is improved and would
be
> best case, and not even nominal (all adjacent channels quiet).
>
> Obviously, there are a lot of system variables that come into account
when
> considering crosstalk, but it would seem that we could improve the
harshness
> of these patterns by not making all 4 channels have the same data
patterns.
>
> John D'Ambrosia
> Manager, Semiconductor Relations
> Tyco Electronics Corporation
>
> Tel. 717.986.5692
> Mobile 717.979.9679
>
> email - john.dambrosia@tycoelectronics.com
>
>

--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 Mike Jenkins               Phone: 408.433.7901            _____    
 LSI Logic Corp, ms/G715      Fax: 408.433.7495        LSI|LOGIC| (R)  
 1525 McCarthy Blvd.       mailto:Jenkins@LSIL.com <mailto:Jenkins@LSIL.com>
|     |    
 Milpitas, CA  95035         http://www.lsilogic.com
<http://www.lsilogic.com>       |_____|   
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~