[802.3ae_Serial] RE: CRPAT / CJPAT Pattern Question
Hi Tom,
You asked a question and things got rather busy so I didn't answer it. I
haven't seen anyone else answer it either so I'll handle it now.
The lanes can have different disparities. For one thing, we don't require
them to start the same but even if they did, they could have different
disparities after the first packet.
Suppose they all start out the same. When they send Idle columns they send
the same thing on each column (in the absence of errors) so they say the
same. Then a packet comes. It has different content on each lane. It is
entirely possible that some lanes have an even number of disparity flipping
characters and other lanes have an odd number during the course of the
packet. Then after the /T/ they will have differing disparity.
Bottom line, the chance of all lanes having the same disparity is about the
same as 4 coin flips resulting in all heads or all tails.
Regards,
Pat
-----Original Message-----
From: Lindsay, Tom [mailto:tlindsay@stratoslightwave.com]
Sent: Thursday, June 14, 2001 5:06 PM
To: pat_thaler@agilent.com; stds-802-3-hssg-serialpmd@ieee.org
Subject: RE: CRPAT / CJPAT Pattern Question
Pat - Good stuff. I knew flipping disparty wasn't exactly the same as
flipping bits, but it appears you have taken a specific look at it. I
had not.
I just now looked at CJPAT. Flipping disparity indeed bit-flips the 7E
bytes, but does not flip the B5 bytes. The other transition bytes are
compromised.
[Actually, this raises a question - were the disparities going to be the
same or different anyway? I assume each lane manages its disparity
independently, but I had always assumed the disparities would be the
same... ]
Anyway, I was trying to think of a compromise that left the orignal
pattern cores intact, straightforward to avoid the significant time to
build a new pattern that best optimized bit flips vs. those cores, and
stayed within 1518 bytes. So the question on this proposal is whether it
flips enough bits to be sufficiently valuable?
I also had the thought that we could pattern-shift the core by 90
degrees in each lane. This, ~like the other proposal, would keep the
same content in each lane as the original core, but would provide
potentially more randomized -and more realistic- crosstalk. Again, this
raises the disparity question above, but it should be less important
here.
Tom
-----Original Message-----
From: pat_thaler@agilent.com [mailto:pat_thaler@agilent.com]
Sent: Thursday, June 14, 2001 3:48 PM
To: Lindsay, Tom; stds-802-3-hssg-serialpmd@ieee.org
Subject: RE: CRPAT / CJPAT Pattern Question
Tom,
Flipping the disparity provides a very different effect from running
complementary bit level. For CRPAT, flipping disparity flips the content
of
five out of twelve 6-bit subblocks and four out of twelve 4 bit
subblocks.
Out of 120 bits in the CRPAT, 46 bits are inverted when the disparity is
flipped. More than half the bits have no value change. One could of
course
construct a pattern where all of the bits flip by restricting the choice
of
characters to those where both the subblocks are not disparity neutral.
However, such a restriction might interfere with the ability to meet the
desired spectral characteristics.
The disparity flipped version of CRPAT will have a bit pattern quite
different from the original CRPAT sequence. Therefore, the spectral
content
of flipped CRPAT should be checked to see that it matches the
requirements.
Pat
-----Original Message-----
From: Lindsay, Tom [mailto:tlindsay@stratoslightwave.com]
Sent: Thursday, June 14, 2001 2:13 PM
To: Serial PMD reflector (E-mail)
Subject: RE: CRPAT / CJPAT Pattern Question
Hi Mike -
You're right about the disparity - unlike Fibre Channel, it is not
controlled in Ethernet. [I would like confirmation on this]. However, it
should be possible to put a "disparity flipper" byte at the beginning of
3 of the other lanes so that they run with alternate disparity for the
balance.
[Note - running the opposite disparity is not exactly the same as
running complementary at the bit level. However, as Mike points out, if
we are to follow disparity rules (I believe we must), then alternating
disparity may be as close as we can get].
Then, the challenge will be to get the preferred pattern to flow through
each of the 4 lanes and still fit within payload length limits. During
creation of CJPAT, I was told that the max payload length was 1518
bytes. To fit within that, 376 bytes (the pattern core) flow in each
lane, and the total payload adds up to 1504 bytes. It is certainly
possible to change the content of 3 of the 4 lanes such that the
alternate of the core flows in them (via the disparity flipper).
However, the total pattern will still be 1504 bytes. If we now want to
cycle the CJPAT core through each of the other 4 lanes, the total
pattern would become 4x larger or 6016 bytes.
Options?
1. The CJPAT core will quickly lose of its stress value if it gets much
shorter than 376 bytes. Can't do that.
2. Have 4 different patterns based on CJPAT (and 4 more for CRPAT??).
Doesn't feel very good.
3. Since disparity cannot be controlled, the CJPAT core was written to
repeat within itself so that 1 of its 2 halves will be the stressful
disparity (the core of the core is 188 bytes). That is, if we
flip/alternate 2 lanes (suggest 2 and 4), then 1 and 3 will run
alternate disparity to 2 and 4. We can do this and still fit within the
1504 bytes.
Is option 3 a compromise worth considering? Others?
Tom
-----Original Message-----
From: Mike Jenkins [mailto:jenkins@lsil.com]
Sent: Thursday, June 14, 2001 1:08 PM
To: 'Serial PMD reflector (E-mail)'
Subject: Re: CRPAT / CJPAT Pattern Question
John, Michael,
Just a thought: The CJTPAT and CRPAT are defined as 8-bit patterns.
I don't believe that initial disparity is prescribed one way or the
other. If we could control the initial disparity per lane, we would
get almost what you're looking for and still stay completely within
the bounds of Annex 48A.
Regards,
Mike
>
> Michael,
> I think you and i are on the same wavelength. My earlier proposal was
> intended to use the proposed CJPAT or CRPAT and just invert one of
them on a
> target channel. I suggest this to minimize the amount of new
discussion, so
> things can keep moving.
>
> Dawson/Rich/Anthony, what do you think?
>
> John
>
> -----Original Message-----
> From: Michael Debie [mailto:mdebie@wavecrest.com]
> Sent: Thursday, June 14, 2001 12:47 PM
> To: DAmbrosia, John F; Michael Debie; 'Serial PMD reflector (E-mail)'
> Subject: RE: CRPAT / CJPAT Pattern Question
>
> John,
>
> Absolutely agree. I was just simplifying my description to one lane,
but, I
> assumed we would test each lane individually. As far as the pattern
> selection is concerned, the use of different patterns on each lane
allows us
> to see the contribution each of the other lanes has on cross talk
noise.
> For example, suppose Lane 1 was driving a /5 clock like pattern
(1111100000)
> the FFT of the jitter on the Lane under test would show a spectral
line at
> Fc/10 and the amplitude of the spectral line would be the pk-pk impact
on DJ
> that Lane 1 has on the Lane Under Test (LUT?). We could set up the
other 3
> lanes with varying degrees of clock like patterns and quickly estimate
each
> lanes contribution to crosstalk on the LUT. We could perform this
test on
> all 4 lanes to measure crosstalk contribution. It would also be
interesting
> to sweep through several clock like frequencies on the non tested
lanes to
> quantify the impact of crosstalk as a function of instantaneous
frequency.
> The test in which we apply the same pattern on all of the non tested
lanes
> will tell us how the crosstalk components combine.
>
> Regards,
> Michael
> -----Original Message-----
> From: DAmbrosia, John F [mailto:john.dambrosia@tycoelectronics.com]
> Sent: Thursday, June 14, 2001 9:11 AM
> To: 'Michael Debie'; 'Serial PMD reflector (E-mail)'
> Subject: RE: CRPAT / CJPAT Pattern Question
>
> Michael,
> I think your second proposal makes more sense, but i think it would
need to
> go one step further. I think we should cycle which lane is the
"different"
> lane like this-
>
> Pat 1A Pat 1B Pat 1C Pat 1D
> Lane A + - - -
> Lane B - + - -
> Lane C - - + -
> Lane D - - - +
>
> Where the "+" lane would be the pattern, and the "-" would be the
> compliment. Thus, all channels get examined. If only 1 lane is
tested,
> then the test is specific to the implemenation, where if all lanes in
a
> channel get examined, then the performance of the channel is fully
examined
> rather than 1/4 of it.
>
> John
>
> -----Original Message-----
> From: Michael Debie [mailto:mdebie@wavecrest.com]
> Sent: Wednesday, June 13, 2001 5:41 PM
> To: DAmbrosia, John F
> Subject: RE: CRPAT / CJPAT Pattern Question
>
> John,
>
> A good diagnostic for cross talk would be to place different frequency
clock
> like patterns on all of the lanes. This could tell us the amplitude
of
> cross talk per other lane and where it comes from. Also, if we run
the same
> patterns on three lanes and one lane different, we could see how the
other
> three lanes combine to effect cross talk on the lane under test.
>
> Regards,
> m
>
> -----Original Message-----
> From: DAmbrosia, John F [mailto:john.dambrosia@tycoelectronics.com]
> Sent: Wednesday, June 13, 2001 4:21 PM
> To: Serial PMD reflector (E-mail)
> Subject: CRPAT / CJPAT Pattern Question
>
> Everyone,
> The 10GEA XAUI Interoperability Group met this week, and were
discussing the
> use of the CRPAT / CJPAT patterns for its testing. A general
observation
> was that the same data pattern appear on all 4 lanes synchronously,
which
> means crosstalk is not really being testing, which was probably being
> accounted for by connector crosstalk budget of 4%. Tyco presented
data
>
http://grouper.ieee.org/groups/802/3/ae/public/may01/dambrosia_2_0501.pd
f
> that showed that crosstalk, which resulted from signals switching
in-phase
> (i.e. high to low or low to high), could actually improve the overall
> response of the system. Thus, the resultant eye is improved and would
be
> best case, and not even nominal (all adjacent channels quiet).
>
> Obviously, there are a lot of system variables that come into account
when
> considering crosstalk, but it would seem that we could improve the
harshness
> of these patterns by not making all 4 channels have the same data
patterns.
>
> John D'Ambrosia
> Manager, Semiconductor Relations
> Tyco Electronics Corporation
>
> Tel. 717.986.5692
> Mobile 717.979.9679
>
> email - john.dambrosia@tycoelectronics.com
>
>
--
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Mike Jenkins Phone: 408.433.7901 _____
LSI Logic Corp, ms/G715 Fax: 408.433.7495 LSI|LOGIC| (R)
1525 McCarthy Blvd. mailto:Jenkins@LSIL.com | |
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