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Hi Chris The classical definition of “quantisation noise” is the additive noise caused by slicing the signal into 2^N levels, so it is directly related to the resolution of the converter. For an 8b resolution ADC or DAC the SNR for a full-scale sinewave (PAR=3dB) is 50dB down from full scale (6.02N+1.78 dB). An ADC or DAC with this SNR would have 8 effective bits (ENOB=8.0), but this can never be achieved in practice due to other sources of noise and distortion not related to the resolution of the converter. When all sources of noise and distortion (including quantisation noise) are added together we get a lower ENOB figure for the converter, for example ENOB=6.0 (your assumption, which is somewhat pessimistic) would correspond to 38dB SNR for a full-scale sinewave – but this is not quantisation noise as this is normally defined. If you mean “the total noise and distortion contribution of the A/D conversion process) this is the definition of ENOB. Your calculation of 9dB PAPR penalty for DMT vs. PAM4 is based on two assumptions – basically, that the PAM4 PAR is close to the ideal value for the constellation: 1. Assumes no pre-emphasis is used for PAM4 to compensate for bandwidth limitations in the TX chain (DAC/package/PCB/driver/modulator/laser) a. depending on bandwidths, typically 3dB of DAC dynamic range (0.5 ENOB) is used up with PAM4 pre-emphasis 2. Assumes the PAR seen by the ADC is the same as transmitted, which ignores the bandwidth of the RX chain (PD/TIA/PCB/package/ADC) a. the attenuation of high-frequency components (101010) means the PAR seen by the ADC is increased for PAM4 Especially for 100G/lambda PAM4 the effect of both these factors is significant because of the bandwidth requirements, and I’m not convinced that these factors have been allowed for in your calculations – if I’m wrong, please explain where these are included. A third issue is clock jitter amplification at both TX (due to pre-emphasis) and RX (due to FFE) which is again significant for PAM4, especially at 100G/lambda where the baud rate is higher (less jitter can be tolerated) and more equalisation is needed (jitter amplification is bigger). A multi-tap DFE which does not amplify RX jitter has major implementation problems at these clock rates. Another jitter issue is the required clock phase noise when running the RX at 1 sample per bit, because the clock recovery loop has to be narrow bandwidth to suppress noise from the low-gain phase estimator, which means the loop cannot then suppress phase noise in the sampling clocks (from reference clock noise and/or clock PLL). This either means that the required clock jitter is extremely (impractically?) low or that eye closure from jitter will be worse than expected. All these are issues linked to real PAM4 implementation penalties which do not seem to be adequately included in your analysis – again, please correct me if I’m wrong. (they are all included in our DMT simulation and measurement results – and comparisons with PAM -- because these are based on real hardware, with simulation models fitted to actual measurements) It’s crucial that such real implementation penalties are included when trying to compare two very different modulation systems, and I’m concerned that the numbers being presented for PAM4 compared to DMT in your analysis are overly optimistic because they do not correctly include such penalties. Cheers Ian Ian Dedic Chief Engineer Communications Business Unit Fujitsu Semiconductor Europe GmbH 3 Concorde Park, Concorde Road Maidenhead SL6 4FJ, UK Tel : +44 (0) 1628 504 711 Mob : +44 (0) 7795 534 253 *** NEW *** From: Chris Cole [mailto:chris.cole@xxxxxxxxxxx] Hi Ian, The DMT Electrical BTB measurements on page 15 (page 14 footer numbering) show the combined effect of DAC and ADC quantization. This is an elegant measurement that has been used for the past 30 years to show the total electrical SNDR (Signal-to-Noise Distortion Ratio) in communications systems due to DAC quantization in TX and ADC quantization in RX. When the quantization contribution is uncorrelated with the signal, as is the case for the PMD proposals in 802.3bs, the contribution can be approximated as an additive noise term Nq’ in SNR at the decision slicer. The Wiki reference discusses this nicely. SNR (w/o quantization) = S/N SNR (w/ quantization) = ~S/(N + Nq’) The reason for the prime term is that this is a filtered version of the quantization noise that is measured by the electrical BTB measurement. Some DSP algorithms, for example for sigma delta converters, dramatically reduce the quantization term. For finite quantization: Nq’ > 0 Therefore: S/N > S/(N + Nq) Since Nq reduces or degrades the SNR, it is a penalty. As pointed out in an earlier email, the tricky part is that the is an additive term, whereas penalties are multiplicative (dB). To convert Nq effect on SNR to a penalty, it has to be calculated together with all other impairments, i.e. a full end to end link simulation. The penalty is the difference between SNR with finite quantization and SNR with no quantization. This is similar to how TDP is calculated. For the 2km LAN-WDM DMT proposal in 802.3bs, we calculated the SNR penalty with quantization (6 ENOB DAC and 6 ENOB ADC) as 3dB (excluding other RX design limitations) of which we allocated 2.5dB to TDP and 0.5dB as RX quantization penalty. The latter is in rough agreement with your 10% estimate, which corresponds to a 0.4dB SNR penalty. We also agree that this is not the dominant term. The dominant term is the modulation penalty including PAPR effects which is 9dB.
Chris From: Dedic, Ian [mailto:Ian.Dedic@xxxxxxxxxxxxxx] Just to make it clear, the page referred to does not really show the effects of quantisation noise as such – it shows the effect on bit rate of using better ADCs and DACs with higher ENOB (Effective Number Of Bits), which includes everything causing noise and distortion (including jitter). At these sample rates ADC/DAC performance is not limited by quantisation noise in either case, other causes of noise and distortion dominate – for example if an 8 bit ADC or DAC has ENOB=6.3 (a good figure!) the ideal quantisation noise (ENOB=8.0) is 10dB below the overall noise, so only contributes 10% with 90% coming from other sources. I guess American page numbering has the title slide labelled as page 1, where European numbering has the first content slide labelled as page 1, just like a book J Ian Ian Dedic Chief Engineer Communications Business Unit Fujitsu Semiconductor Europe GmbH 3 Concorde Park, Concorde Road Maidenhead SL6 4FJ, UK Tel : +44 (0) 1628 504 711 Mob : +44 (0) 7795 534 253 *** NEW *** From: Chris Cole [mailto:chris.cole@xxxxxxxxxxx] While the technical results in Ian’s July presentation are impressive, his page numbering is off. Or we have the same problem as with how floors are numbered in a building, with Ian following the European convention. Below is the correct link to the page showing the additive effects of TX and RX quantization: http://www.ieee802.org/3/bs/public/14_07/dedic_3bs_01a_0714.pdf#page=15 Chris From: Chris Cole [mailto:chris.cole@xxxxxxxxxxx] Hi Sudeep, An elegant measurement showing the additive effects of TX and RX quantization is shown in Ian’s July presentation: http://www.ieee802.org/3/bs/public/14_07/dedic_3bs_01a_0714.pdf#page=14 Chris From: Chris Cole Hi Sudeep, Here is a nice discussion on the subject: http://en.wikipedia.org/wiki/Quantization_(signal_processing) Chris From: Sudeep Bhoja [mailto:sbhoja@xxxxxxxxx] Chris, I am still struggling to understand what you mean by quantization noise penalty in TX and RX. Can you please explain? Thanks, Sudeep
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