Re: [STDS-802-3-400G] Reed-Solomon settings
Hi Tomas,
I am sorry, this is not helpful.
The choices that the Task Force has made for FEC have been made after considering a variety of candidate codes and examining their characteristics not only in terms of effective coding gain, but in terms of die area for ASIC or FPGA implementations and in terms of latency. What has been selected is a code that provides sufficient gain for the reaches we have in the project objectives, within an amount of latency that is acceptable in the Ethernet world, and a reasonable amount of die area (and hence power), more or less the "sweet spot" among all of the elements participants are trying to optimize.
Could you get more coding gain with more FEC redundancy? Well of course you could, that is obvious to everybody, but it would also come at a penalty with respect to power and latency, and presumably this would only be needed (or done) to provide capability for reaches in excess of our project objectives. So in the context of the Task Force, you would need to be making the case that we haven't found the correct "sweet spot" for our objectives. Whether the "sweet spot" might have been different if we had objectives for long reach interfaces isn't relevant to this task force.
If you are arguing that there is a need to develop longer reach interfaces than this Task Force is targeting, you need to back up a few steps in the process: you would need to begin with a "Call for Interest" for a new, longer reach 400GbE project, then establish through the Study Group process that there was broad market potential for those longer reach interfaces (just as the 400 Gb/s Ethernet Study Group demonstrated the broad market potential for the reaches being developed in this Task Force), and only then do you start trying to choose a FEC code and the right amount of FEC redundancy and coding gain required to achieve those increased reaches within the power and latency that would be expected of such an interface.
Regards,
Steve
-----Original Message-----
From: Ing. Tomas Pajda, CCNA [mailto:ing.tomas.pajda@xxxxxxxxx]
Sent: Thursday, November 19, 2015 11:58 AM
To: STDS-802-3-400G@xxxxxxxxxxxxxxxxx
Subject: [STDS-802-3-400G] Reed-Solomon settings
Hello, I would like to suggest one technical proposal to the standard. If we use more redundancy bits of Reed-Solomon FEC on the physical layer and at the same time put more symbols that are making a codeword from RS encoder to the modulator, which will transform the codeword into the modulation symbols alphabet, we can get higher transmission speed, because even if more errors occure during the transmission, we will be able to correct them using FEC more redundancy bits. So the good settings of the cooperation between the FEC and modulation can increase the transmission speed, even in longer distance. I suggest consideration.
Ing. Tomas Pajda, CCNA,
IEEE#93177474