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Prashant, It is due to the scrambler location.
Please feel free to submit comments against draft 1.1 when that comes out if you believe corrections needed. Thanks, Mark Gustlin From: Dixit, Prashant [mailto:Prashant_Dixit@xxxxxxxxxx]
Hi All, In 802.3bs, Clause 119, Section 119.2.5.6 256B/257B to 64B/66B transcoder, where reverse transcoding of one 257-bit block into 4 - 66 bits blocks is defined. It seems there are couple of discrepancies in that algorithm : 1.
In sub-point e2) g<3:0> has been used but it is not described how to generate g<3:0>. 2.
Also we have observed that Tx transcoder function (4 - 66bits blocks to 1 - 257bits) defined in
802.3bj specs, Section 91.5.2.5 (RS-FEC layer) is exactly the same as Tx transcoder function defined in
802.3bs Section 119.2.4.2. But the RX reverse transcoder function (1 - 257 bits block to 4 - 66 bits blocks) defined in 802.3bs, Section 119.2.5.6 is quite different from the same function defined in 802.3bj, Section 91.5.2.5. Is it intentional ?
If it is intentional and correct why Rx algorithms are different if Tx algorithm are same. Is it due to the scrambler position which is different in both the versions ? Please correct me if I missed something or advice accordingly. Thanks and regards Prashant |