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all, my humble suggestion is to use more redundancy of FEC and modulation with more symbols to be able to absorb longer length of the codeword by the modulator. Please let me know if it is even considerable for higher transmission speed. Ing. Tomas Pajda, CCNA, IEEE#93177474 ----- Reply message ----- Od: "John D'Ambrosia" <jdambrosia@xxxxxxxxx> Komu: <STDS-802-3-400G@xxxxxxxxxxxxxxxxx> Predmet: [STDS-802-3-400G] Query in 802.3bs Draft 1.0 : Clause 119 Dátum: so, nov 21, 2015 23:09 All, I want to re-iterate something Mr. Gustlin said in his email response – we are now into the Task Force Comment Phase. The appropriate way to have concerns regarding the 400GbE specification addressed is to submit comments when the document is out for comment review (of course the scope of the document under consideration should be considered). Please keep this in mind going forward. Thanks for consideration of this matter. Regards, John D’Ambrosia Chair, IEEE P802.3bs 400GbE Task Force From: Dixit, Prashant [mailto:Prashant_Dixit@xxxxxxxxxx] Hi Mark, Thanks for the quick reply. What about the calculations of g<3:0> which is used to find the block type field of the blocks ? In specifications Section 119.2.5.6, @ page 98 it is written that g<3:0> is used but not shown how it is calculated ? Please let me know about this how to calculate g<3:0> ? Thanks and regards Prashant From: Mark Gustlin [mailto:mark.gustlin@xxxxxxxxxx] Prashant, It is due to the scrambler location. Please feel free to submit comments against draft 1.1 when that comes out if you believe corrections needed. Thanks, Mark Gustlin From: Dixit, Prashant [mailto:Prashant_Dixit@xxxxxxxxxx] Hi All, In 802.3bs, Clause 119, Section 119.2.5.6 256B/257B to 64B/66B transcoder, where reverse transcoding of one 257-bit block into 4 - 66 bits blocks is defined. It seems there are couple of discrepancies in that algorithm : 1. In sub-point e2) g<3:0> has been used but it is not described how to generate g<3:0>. 2. Also we have observed that Tx transcoder function (4 - 66bits blocks to 1 - 257bits) defined in 802.3bj specs, Section 91.5.2.5 (RS-FEC layer) is exactly the same as Tx transcoder function defined in 802.3bs Section 119.2.4.2. But the RX reverse transcoder function (1 - 257 bits block to 4 - 66 bits blocks) defined in 802.3bs, Section 119.2.5.6 is quite different from the same function defined in 802.3bj, Section 91.5.2.5. Is it intentional ? If it is intentional and correct why Rx algorithms are different if Tx algorithm are same. Is it due to the scrambler position which is different in both the versions ? Please correct me if I missed something or advice accordingly. Thanks and regards Prashant |