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All, Here is the agenda for the next logic ad hoc (2/23): Proposed MAC and PCS sublayer delay – Mark Gustlin et al. AMP_Valid and PCS_Lane TBDs – Mark Gustlin Skew in 400GbE – Mark Gustlin Alignment Marker Format Updates – Adrian Butter Thanks, Mark Gustlin From: Mark Gustlin [mailto:mark.gustlin@xxxxxxxxxx] All, As previously announced, the next IEEE P802.3bs 400 Gb/s Ethernet Task Force Logic Ad Hoc conference call is set for Tuesday February 23rd from 8-10am PST. If you are interested in presenting, please request a timeslot by the end of Friday February 19th.
When requesting a timeslot, please keep in mind the ad hoc charter: The charter of the Logic Ad hoc will be to address all issues in relation to the overall architecture of IEEE P802.3bs to ensure progress towards a technically complete draft. In addition the website is updated with today's presentation and minutes (attendees have not been added yet): http://www.ieee802.org/3/bs/public/adhoc/logic/index.shtml Thanks, Mark Gustlin -- Do not delete or change
any of the following text. -- |