Ali
Seems that even though when I reply “all” and include the STDS… group, my emails don’t make it to the group.
Thank you for passing it along.
I would like to say that I am impressed with the level of co-operation and contributions from the members of this organization.
I did not mean to infer that someone is trying to force a particular solution.
I was merely asking folks to understand the implications, (e.g. T/2 versus T spacing)
My understanding is that the same reference receiver architecture is also used for 50G systems where the bandwidth is ½ that of 100G
And the UI interval is twice that 100G. Hence would this equalizer architecture make sense there?
If a company develops a 100G tx/rx system why not re-use it for 50 G and enjoy the extra bandwidth.
I admit that I have limited understanding of the standard and test methods, but “if” I understand TDECQ correctly I find it strange
that there are not more constraints on the transmitter given that the reference receiver equalize is free to compensate a “bad” TX.
I think this is alluding to what someone has already brought up about the TX meeting pk-pk requirements but having a small eye opening.
Perhaps bounding the tap weights on the equalizer?. BTW, is the reference tap defined?
Pulling on my radio knowledge, e.g. LTE (OFDM) and Wifi, both standards allow the receiver to have an equalizer when making EVM (error vector magnitude)
measurements on the transmitter, but the transmitter has strict requirements on the TX waveform and on TX filtering.
I am still overwhelmed with all the details and nuances but I am learning and look forward to being further educated.
(btw: I deleted the rest of the “chain” below.)
From: Ali Ghiasi [mailto:aghiasi@xxxxxxxxx]
Sent: Thursday, June 22, 2017 6:08 PM
To: Bill Kirkland
Cc: STDS-802-3-400G@xxxxxxxxxxxxxxxxx
Subject: Re: [STDS-802-3-400G] IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet SMF Ad Hoc conference call
Bill
Given that we have already defined a reference equalizer with 5 taps T spaced a naked CDR no longer sufficient!
For 100 Gb/s PAM4 link operation with a naked CDR you need 50+ GHz components to get a cascaded TX and RX BW of ~32 GHz.
No body is trying to force a solution, but we need to define the PMDs so one can achieve high yield, interoperable links,
and there is path to cost reduction.
Ali, in reference to 5 taps, I think it is in part about creating a level playing field for folks using different technologies and processes.
(I still claim ignorance , but I believe not everyone is using CMOS/Bi-CMOS and some folks might not even be trying to use an FFE in the Rx).
I would hope that the reference receiver architecture would not “force” certain RX technology decisions unnecessarily.