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Re: [802.3_4PPOE] PSE State-Diagram update to add new sequence

This time with attachements J

 

 

From: Chris Bullock (bullock)
Sent: Wednesday, October 07, 2015 11:11 PM
To: 'STDS-802-3-4PPOE@xxxxxxxxxxxxxxxxx'
Subject: PSE State-Diagram update to add new sequence

 

All,

 

I wanted to send this out to the reflector to give everyone as much time as possible to review this on our compressed cycle.  There will be a more complete presentation next week in Cattania.

 

Attached is an updated timing diagram and state diagram with an additional sequence (CC_DET_SEQ = 3) that was proposed by Dan Dove and Dave Dwelley.  This sequence allows for staggered detection and staggered powering of DS PDs.

 

Thanks,

Chris

Attachment: Detect Sequence 3 timing diagram - Staggered Power-on of DS PDs.pdf
Description: Detect Sequence 3 timing diagram - Staggered Power-on of DS PDs.pdf

Attachment: PSE_SD_100615_seq3.pdf
Description: PSE_SD_100615_seq3.pdf