Re: [802.3_4PPOE] State diagram solution for comments #115, #130

[David Stover <00000687aebafbf1-dmarc-request@xxxxxxxx>]

All,

Here is an updated remedy to comments #115 and #130, including feedback from the TF.

For your reference, here is the existing draft text that we are trying to represent in the state diagram:

33.2.7.2: "If any measured IClass is equal to or greater than IClass_LIM min, a Type 2, Type 3 or Type 4 PSE shall return to the IDLE state."

1)

* Add a new variable to 33.3.3.7:

   iclass_lim_det: A variable indicating if the measured IClass during do_classification is equal to or greater than IClass_LIM min as defined in Table 33-15

      TRUE: Measured IClass is equal to or greater than IClass_LIM min during do_classification.

      FALSE: Measured IClass is less than IClass_LIM min during do_classification.

* Modify the asynchronous entry arc transition logic into IDLE as follows: "(mr_pse_enable = enable) * (pse_reset + iclass_lim_det + error_condition)"

2)

* Add a new variable to 33.3.3.7:

   iclass_lim_det_pri: A variable indicating if the measured IClass over the primary alternative during do_classification_pri is equal to or greater than IClass_LIM min as defined in Table 33-15.

      TRUE: Measured IClass over primary alternative is equal to or greater than IClass_LIM min during do_classification_pri.

      FALSE: Measured IClass over primary alternative is less than IClass_LIM min during do_classification_pri.

* Add an asynchronous entry arc into IDLE_PRI with transition logic "iclass_lim_det_pri"

3)

* Add a new variable to 33.3.3.7:

   iclass_lim_det_sec: A variable indicating if the measured IClass over the secondary alternative during do_classification_sec is equal to or greater than IClass_LIM min as defined in Table 33-15.

      TRUE: Measured IClass over secondary alternative is equal to or greater than IClass_LIM min during do_classification_sec.

      FALSE: Measured IClass over secondary alternative is less than IClass_LIM min during do_classification_sec.

* Add an asynchronous entry arc into IDLE_SEC with transition logic "iclass_lim_det_sec"

On Wed, May 25, 2016 at 4:32 PM, David Stover <dstover@xxxxxxxxxx> wrote:

All,

Attached, please find a mark-up of the Type 3 and Type 4 PSE state diagrams to address...

* Comment #115: Per 33.2.7.2, the PSE shall return to the IDLE state in the event any measured IClass is equal to or greater than IClass_LIM. This is not reflected in the PSE SD.

* Comment #130: SISM state machines experiencing class overcurrent should return to their resident IDLE_PRI/IDLE_SEC state, and not the global IDLE state.

Per request by Mr. Thompson, I have formed my proposed remedy against the state diagram in text form.

Proposed remedy:

1)

* Add a new variable to 33.3.3.7:

   iclass_lim_det: A variable indicating if the PSE output current during do_classification has exceeded IClass_LIM as defined in Table 33-15

      TRUE: PSE output current has exceeded IClass_LIM during do_classification.

      FALSE: PSE output current has not exceeded IClass_LIM during do_classification.

* Modify the asynchronous entry arc transition logic into IDLE as follows: "(mr_pse_enable = enable) * (pse_reset + iclass_lim_det + error_condition)"

2)

* Add a new variable to 33.3.3.7:

   iclass_lim_det_pri: A variable indicating if the PSE output current over the primary alternative during do_classification_pri has exceeded IClass_LIM as defined in Table 33-15.

      TRUE: PSE output current over primary alternative has exceeded IClass_LIM during do_classification_pri.

      FALSE: PSE output current over primary alternative has not exceeded IClass_LIM during do_classification_pri.

* Add an asynchronous entry arc into IDLE_PRI with transition logic "iclass_lim_det_pri"

3)

* Add a new variable to 33.3.3.7:

   iclass_lim_det_sec: A variable indicating if the PSE output current over the secondary alternative during do_classification_sec has exceeded IClass_LIM as defined in Table 33-15.

      TRUE: PSE output current over secondary alternative has exceeded IClass_LIM during do_classification_sec.

      FALSE: PSE output current over secondary alternative has not exceeded IClass_LIM during do_classification_sec.

* Add an asynchronous entry arc into IDLE_SEC with transition logic "iclass_lim_det_sec"

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Cheers,

David Stover II

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Cheers,

David Stover II