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All, while reviewing the spec I noticed these numbers in Table 145-28 (PD power supply table):
Single-signature PD,
Class 7 to 8
IInrush_PD 0.8A
Single-signature PD,
Class 7 to 8
IInrush_PD-2P
0.6A
And this in the text portion (145.3.8.3): PDs shall draw less than IInrush_PD
and IInrush_PD-2P
from TInrush_PD
max until Tdelay-2P
min
This means that the PD can only draw 800mA max on inrush but that it could be 600mA on one pairset and 200mA on the other. This is an immense amount of imbalance – more than a PD is allowed to have. Why do
we have such a large allowance on inrush? Chad Jones Tech Lead, Cisco Systems Chair, IEEE P802.3bt 4PPoE Task Force |