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Hi David,
Fair point. Made a couple changes:
- Used a named parameter rather than just specify 1.3mA in the text
- The current is actually coming out of the negative pins toward the PD, ergo changed the text to say 'source' rather than draw
- The PD would need to push that negative pair lower than its own negative supply for the current to increase... which would constitute 'sourcing power' and is no longer reflecting a voltage, but imposing one.
Kind regards,
Lennart
On Wed, 2018-05-02 at 19:31 +0000, Stover, David wrote:
Hey Lennart,
As always, thanks for your hard work on this. Seems like we’re converging on a solution. I’m still reviewing, but wanted to point out a concern I have regarding the ‘reflected voltage’ requirement:
“A PSE, operating in 2-pair mode shall not draw a current higher than 1.3 mA on the negative pair of the unpowered pairset.”
Taken in isolation, I believe this requirement is missing a critical qualification: applied voltage. Surely we do not want to enforce this requirement e.g. for applied voltage greater than PSE output voltage.
My proposed change:
“A PSE operating in 2-pair mode shall not sink current greater than 1.3mA on the negative pair of the unpowered pairset for any voltage applied in the range of 0 V to VPSE-OC, where VPSE-OC is the open circuit voltage of the powered
pairset.”
Notice a new term VPSE-OC, to address a concern that VPSE specifies a measurement point but does not qualify who is applying this voltage. This solution attempts to clarify that the maximum applied voltage during this test should be no
greater than the PSE output voltage.
-David
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