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Isn’t this what we are trying to do? Specify an allowed current at the PI that would lead you directly to implement specific resistance internally? That’s what I see the group trying to do.
We are trying to set limits of behavior that will ensure interoperability based on the known operating conditions – one of them being these 802.3-2015 compliant devices already in the field that will unexpectedly present a 3P + 1P power
channel to a PSE in classification. Dave Abramson has pointed out that we have 1mA guard bands in classification that likely explain why we haven’t seen any issues from the field, and that this margin gives us the solution (finally, a good result from the
margin on top of margin that was built into the AF spec). Chad Jones Tech Lead, Cisco Systems Chair, IEEE P802.3bt 4PPoE Task Force Principal, NFPA 70 CMP3 From: Yair Darshan <YDarshan@xxxxxxxxxxxxx> To unsubscribe from the STDS-802-3-4PPOE list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=STDS-802-3-4PPOE&A=1 |