Hi Chad,
I don’t understand why you have an issue to add this text.
The PD vendor is not aware of Irev since this is the PSE spec and you and others many times said that the PD vendor get a PD spec and start to design without looking on PSE spec or
aware of it which I believe it is a correct scenario.
By the way, during last meeting we change the PSE and PD spec to address similar issues concerning to the effect of Irev on other spec items and this is one of them.
I can never agree to a situation that you have a clear requirement in a PD for what to do regarding MPS (or other spec items) without telling the PD vendor that there is something
waiting for him in the corner… in the PSE spec that is not mentioned in the PD spec that can make his PD uncompliant. I don’t see a reason to
hide such critical information.
And last, If you are worry about meeting our schedule, I believe that we are OK since we have the meeting next week or so.
Yair
From: Chad Jones (cmjones) [mailto:cmjones@xxxxxxxxx]
Sent: Tuesday, June 12, 2018 8:34 PM
To: Yair Darshan <YDarshan@xxxxxxxxxxxxx>; STDS-802-3-4PPOE@xxxxxxxxxxxxxxxxx
Subject: Re: [802.3_4PPOE] MPS issue due to the allowance for reflected voltage in 3-pair mode
EXTERNAL EMAIL
You are probably going to be surprised by my next statement, based on my insistence that 3P+1 powering (Irev) was a PSE problem. Or maybe not, because my logic is 100% the same: the
onus to solve the problem is on the device that causes the problem. It’s not our job to write a design guide such that they won’t have any problems.
This is the PD’s problem. The PD designer knows he wants to use MPS to shut down and he has to design it accordingly. If he puts in a bridge that is susceptible to Irev, he needs
account for this when he implements his desired feature. So I would say, the PD designer cannot use some of the FET bridges that have been shipped in the past – or he needs to remove 1.3mA from his ‘shutdown budget’, in other words: less than 0.7mA for the
rest of the device.
OR he could use LLDP to have the PSE shut him off.
There are many ways to get this solution and none of them involve adding any more text to the standard.
Chad Jones
Tech Lead, Cisco Systems
Chair, IEEE P802.3bt 4PPoE Task Force
Principal, NFPA 70 CMP3
From:
Yair Darshan <YDarshan@xxxxxxxxxxxxx>
Reply-To: Yair Darshan <YDarshan@xxxxxxxxxxxxx>
Date: Tuesday, June 12, 2018 at 10:27 AM
To: 4PPOE Reflector <STDS-802-3-4PPOE@xxxxxxxxxxxxxxxxx>
Subject: Re: [802.3_4PPOE] MPS issue due to the allowance for reflected voltage in 3-pair mode
I agree that it doesn’t affect
the case when the PD is disconnected from the cable.
I was referring to the case that the PD is connected and wants power removal. The question if it is rare or not, is irrelevant since it
is already in the spec and we need to address it somehow and meet it.
I agree that the solution can be that PDs that do want to have power removed can set their Iport_mps value for power removal to be lower
than (4mA-1.3mA)=2.7mA. However, in order to make this clear to the PD vendor (since Irev is in the PSE section) I believe that we need to add text to the PD MPS section as follows (or equivalent):
Proposed remedy:
Add the following text in clause 145.3.9, page 222 text after line 49:
"When a PD is operating under 3-pair mode conditions, the value of IPort_MPS as seen by the PSE over the powered pair may increase by
Irev (see See 145.2.10.4, 145.3.8.8 ). As a result, the PD may need to set IPort_MPS to alower value than IPort_MPS min to ensure power removal."
Yair
From: Lennart Yseboodt [mailto:00000b30a2081bcd-dmarc-request@xxxxxxxx]
Sent: Tuesday, June 12, 2018 12:04 AM
To: STDS-802-3-4PPOE@xxxxxxxxxxxxxxxxx
Subject: Re: [802.3_4PPOE] MPS issue due to the allowance for reflected voltage in 3-pair mode
EXTERNAL EMAIL
Hi Yair,
Your analysis is correct, the reverse current is added to the PDs own current.
I don't consider this an issue we need to do anything about however:
- it does not impair the primary function of MPS in any way (to remove power when the PD is disconnected)
- it only affects PDs that use the method of removing MPS in order to have the PSE remove power, I would say this is pretty rare;
- PDs that do want to have power removed can accommodate for the maximum 1.3mA of reverse current (draw less than 2.7mA of their own)
Note that reverse current only happens under 3-pair conditions, and then the 'must disconnect' current level is 4mA for PSEs.
Kind regards,
Lennart
On Mon, 2018-06-11 at 12:03 +0000, Yair Darshan wrote:
Hi all,
I found new problem that we need to discuss how to handle it.
In 3-pair mode during power on state, when a PD don’t want to be powered, it generates e.g. MPS=1.9mA which means PSE must disconnect, but due to the PD that doesn’t meet the backfeed on the unpowered pair, the unpowered pair consumes additional 1.3mA and this is added to the MPS. Under these conditions, the PD will not be disconnected.
Moreover, in general, a constant error of additional MPS current is added by the PSE…..instead of PD only should control the MPS current.
Let’s start to discuss this.
Yair
Darshan Yair
Chief R&D Engineer
Analog Mixed Signal Group
Microsemi Corporation
1 Hanagar St., P.O. Box 7220
Neve Ne'eman Industrial Zone
Hod Hasharon 45421, Israel
Tel: +972-9-775-5100, EXT 210.Cell: +972-54-4893019
Fax: +972-9-775-5111
E-mail: <mailto:ydarshan@xxxxxxxxxxxxx>.
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