Re: [802.3_B400G] [802.3_B400G_LOGIC] P802.3dj Joint Logic/Optics Track

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All

I will be discussing this topic further with Mr. Law shortly.

Despite assertions it is the same device - the current tx proposal is not the same device running at lower rates as there were other changes to the tx / tx proposed.

Your patience is appreciated

Regards

John

Sent from my iPhone

On Aug 16, 2023, at 12:49 PM, Chris Cole <chris.cole@xxxxxxxxxxxx> wrote:

Hi Ali,

If inner FEC is specified for plug and play DR and FR, the specifications for the no inner FEC mode falls out of it. It's the same implementation operating at the lower rate. This leads to reduced performance, for example lower power budget. Whether that's useful is a separate question.

Given the confidence by TF participants in no inner FEC feasibility, we should revisit writing a spec. for only this case. This is especially true for DR.

One option is to specify DR only with end-to-end FEC, and FR and LR are with inner FEC, again subject to demonstrating feasibility.

Chris

From: Ali Ghiasi <aghiasi@xxxxxxxxx>
Sent: Wednesday, August 16, 2023 9:03 AM
To: STDS-802-3-B400G@xxxxxxxxxxxxxxxxx <STDS-802-3-B400G@xxxxxxxxxxxxxxxxx>

Subject  Re: [802.3_B400G] [802.3_B400G_LOGIC] P802.3dj Joint Logic/Optics Track ad hoc agenda 8/15/23

Hello Chris,

One of the key reason for success of IEEE 802.3 standards as said is the Five Criteria (CSD) and technical feasibility, on the DJ website under Technical Feasibility we have:

https://mentor.ieee.org/802-ec/dcn/22/ec-22-0256-00-ACSD-p802-3dj.pdf [mentor.ieee.org]

At a minimum, address the following items to demonstrate technical feasibility:

a) Demonstrated system feasibility.

b) Proven similar technology via testing, modeling, simulation, etc.

c) Confidence in reliability.

I am sure at some point in time 200 Gb/s/lane optics will evolve sufficiently where one with confidence and reliable operate such link with just KP4 FEC.

If for some reason the future TX technology (2nd Gen Sipho/TFLN ??) are ready for deployment in 12-18 months then there is no reason to define PMDs with inner FEC!

We should not hack defining future optics PMDs based on 1st Gen 200G TX optics!

Thanks,

Ali Ghiasi
Ghiasi Quantum LLC

On Aug 15, 2023, at 1:52 PM, Chris Cole <chris@xxxxxxxxxxxxxxx> wrote:

During today's Ad Hoc call, John D'Ambrosia's and David Law's presentation [ieee802.org]very nicely illuminated the disconnect we have in the Task Force on standardizing FEC bypass.

One perspective is that we create new objectives for the same reach, with independent specs. at a lower rate and only end to end FEC. Part of the motivation is that a better TX modulator removes the need for inner FEC. If we adopt this approach, we will have two solutions to the same problem: 1) "bad" TX with inner FEC to make up for the badness, 2) "great" TX without the need for inner FEC. Unfortunately, we have 802.3 Five Criteria to contend with. Distinct Identity clearly states there will be one solution to one problem. If DI doesn't apply here, then we might as well discard it, and going forward only have 802.3 Four Criteria.

FEC bypass should be a lower performance operating mode for the same HW. This is the basis on which I supported moving forward with it. We have to add a full set of specifications for this mode. This is why the general approach we take for ER is good precedent. The Plug-and-play spec column is at the higher rate with inner FEC. The Engineered spec column is at the lower rate with inner FEC bypassed. An end user can then look at the spec, and for example conclude that for their shorter reach ML clusters, the FEC bypassed mode works just fine. However, the specifications lead to one component type. The industry does not need component type proliferation driven by IEEE. That leads to market fragmentation.

Alternatively, if we really believe that "good" TX technology is available, let's not bother having an inner FEC. Let's forget writing a spec for "bad' TX and write one spec. for end-to-end FEC only.

Either way, we do not need new objectives. We have single 500m and 2km objectives, each with two modes (Plug-and-play and Engineered) with different levels of performance and operating parameters like rate, or just one Plug-and-play mode without inner FEC.

Chris

On Mon, Aug 14, 2023 at 6:15 AM Mark Nowell (mnowell) <00000b59be7040a9-dmarc-request@xxxxxxxxxxxxxxxxx> wrote:

Hi Everyone,

All files for tomorrow’s joint optics/logic ad hoc meeting are posted here [ieee802.org].

Call in details are available here [ieee802.org].

The technical presentations in the agenda are:

" FEC Bypass: Procedural Considerations " presented by John D’Ambrosia, Futurewei, US Subsidiary of Huawei
" Performance Evaluation of Inner FEC Synchronization Methods " presented by Xiang He, Huawei
" Specifying BER in PMD clauses " presented by Adee Ran, Cisco
" DGDmax specification for 10km Ethernet" presented by Maxim Kuschnerov, Huawei

We may be holding a straw poll after the first presentation to gather directional feedback for Task Force leadership.

I want to remind all teleconference meeting participants to review the following documents prior to participation in an IEEE 802.3 meeting teleconference:

IEEE SA patent policy
IEEE SA Copyright Policy
IEEE SA Participation Policy

All of these policies may be found at http://ieee802.org/3/policies.html [ieee802.org]



Thanks,

Mark N

IEEE P802.3dj optics track leader

And

Mark G

IEEE P802.3dj architecture and logic track leader

From: Mark Nowell (mnowell) <00000b59be7040a9-dmarc-request@xxxxxxxxxxxxxxxxx>
Date: Monday, August 7, 2023 at 5:36 PM
To: STDS-802-3-B400G-LOGIC@xxxxxxxxxxxxxxxxx <STDS-802-3-B400G-LOGIC@xxxxxxxxxxxxxxxxx>
Subject: Re: [802.3_B400G_LOGIC] P802.3dj Joint Logic/Optics Track June ad hoc meetings announcement

Reminder to everyone about next Tuesday’s IEEE P802.3dj joint logic and optics track ad hoc meetings.

There are deadlines this week for agenda requests (Wednesday) and presentation submission (Friday).

Regards, Mark

From: Mark Nowell (mnowell) <mnowell@xxxxxxxxx>
Date: Thursday, July 13, 2023 at 10:47 AM
To: STDS-802-3-B400G-OPTX@xxxxxxxxxxxxxxxxx <STDS-802-3-B400G-OPTX@xxxxxxxxxxxxxxxxx>, STDS-802-3-B400G-LOGIC@xxxxxxxxxxxxxxxxx <STDS-802-3-B400G-LOGIC@xxxxxxxxxxxxxxxxx>
Subject: P802.3dj Joint Logic/Optics Track June ad hoc meetings announcement

This email serves to announce the next IEEE P802.3dj joint logic and optics track ad hoc meetings.



Meeting dates, times and deadlines:

Meeting

Agenda request deadline (5pm PT)

Contribution submission deadline (5pm PT)

Tues Aug 15^th, 7am to 10am PT

Wed Aug 9^th

Fri Aug 11^th

Tues Aug 29^th, 7am to 10am PT

Wed Aug 23^rd

Fri Aug 25^th

The call details will be available on the TF website at https://www.ieee802.org/3/dj/public/adhoc/optics/index.html [ieee802.org] and can be found on the IEEE call and meeting calendar at https://www.ieee802.org/3/calendar.html [ieee802.org]

Coming out of the May plenary meeting, we identified a number of areas where more information is needed or more consensus is needed. The purpose of these ad hoc meetings is allow discussion and contributions on any of these topics. We are holding it joint between the optics and logic teams as a number of these topics relate across both areas.

The goal will be to enable contributors to better refine proposals or provide information relevant to future decisions ahead of the July Plenary meeting. With this being an ad hoc meeting, no decisions can be made but informative straw polls are possible.

At this point, we anticipate topics to potentially include:

Inner FEC padding and synchronization
FEC bypass proposal
Updates on IMDD optical baseline proposals (nothing adopted yet)
Updates on coherent optical baseline proposals (nothing adopted yet here too)

But this is not a complete list of potential topics.

If anyone, does wish to make a short presentation in line with above please make a request by the dates noted above. Please email myself, Mark Gustlin (and John D'Ambrosia, please) the following information:

Name of presenter
Affiliation of presenter
Title of presentation
Length of time requested (this should include time for questions and answers – presentation time, excluding Q&A, will be at the discretion of the chair, and should be assumed to be limited to 30 min)
Brief description of topic

The presenter shall e-mail a PDF, soft-copy version of the presentation to me (and John D'Ambrosia, please) in advance of the meeting per above dates..

All individuals submitting presentations should review the Procedures for Presenters Page: http://www.ieee802.org/3/df/public/presentproc.html [ieee802.org]

Please adhere to the Presentation Style Guidelines. Also, to support the web site search tool used by the IEEE P802.3 web site the 'Document Information' fields of the PDF file must be completed as follows:

Title: Title of presentation
Author: Name(s) of author(s)
Subject: IEEE P802.3dj Task Force

I want to remind all teleconference meeting participants to review the following documents prior to participation in an IEEE 802.3 meeting teleconference:

IEEE SA patent policy
IEEE SA Copyright Policy
IEEE SA Participation Policy

All of these policies may be found at http://ieee802.org/3/policies.html [ieee802.org]



Thanks,

Mark N

IEEE P802.3dj optics track leader

And

Mark G

IEEE P802.3dj architecture and logic track leader

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