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hello Ahmad and Mehmet,
Thank you for your presentation yesterday. I agree with the group consensus to focus on the channel and noise conditions for the upcoming ad-hoc. However, I wanted to follow up with the question I asked about your presentation that you didn’t get a chance to
answer yesterday due to time constraints.
You listed an FDD analog-based PHY as an example and discussed analog-based SerDes trends, concluding that complexity and power can be improved by a TDD architecture over an 802.3ch-based EEE asymmetric implementation.
As I asked on the call, how would you estimate the relative area for the receiver on the camera side of the link when comparing the TDD you presented to an analog-based FDD PHY like the one you mentioned in your presentation, provided both are in the same process
and the FDD PHY has a line code? In your opinion would TDD enjoy the same relative area advantages over an analog-based FDD that you claim over an 802.3ch-based implementation?
Additionally, you mentioned that when comparing TDD to an 802.3ch EEE-based implementation, “The ADC power and area is reduced by up to 75% if 2.5Gbps is used instead of 10Gbps in the reverse link.” On the camera side, if an analog-based FDD PHY is compared
with the TDD receiver and they are in the same process, do you think the same relative receiver power and area advantages hold?
Finally, I recall you mentioned the approximate net data rate for GMSL2 in the forward link (direction from the camera to the central compute) as less than 2.5 and 5Gbps. To set the record straight, the maximum data payload throughput for GMSL2 is 2.6 and 5.2Gbps
at 3Gbps and 6Gbps transmission rates, respectively.
regards,
Jay Cordaro
Analog Devices
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