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Hello Max, thank you for addressing the different levels of latencies/delays in your presentation yesterday. I think it will be very hard to establish and maintain a distinction between delay and
latency. What I am reading from your slide 5 is “first bit in to first bit out = delay” and “first bit in to last bit out = latency”. I think we would be better of distinguishing between delay/latency on bit level (which seems to be done in the 802.3 specs
when talking about PHY delays) and delay/latency on packet level (which happens on MAC level and which I called link latency, though I now think that that is not a particularly good term, packet latency is better).
From a user perspective, Ethernet is a packet based communication system. All user data is put into packets, whether that is application data (like video data) or control data. If control
data is intended for an I2C it would be put inside a packet as I would expect that to be the case for data I want to use for GPIOs. Or am I missing anything here? I would not expect anyone to use the OAM (which is the only side channel I can think of that
bypasses the Ethernet packets) for application related data. That means that a complete packet needs to be received before the application can use its content, which in return means, that to look at the bit-level latency on PHY level without looking
at the overall packet latency is missing something vital. The whole reason we are discussing this is probably that it is more clear on how this relates in a full-duplex (FDD) system while there seems to be some confusion on how it relates in
a half-duplex (TDD) system. However, if a different latency/delay on PHY level makes no difference to the overall latency on packet level, then there is no difference from a system/application point of view.
I will try to visualize that in a presentation for the September interim.
Kind regards,
Kirsten Von: Max Turner <max.turner@xxxxxxxx>
Dear all! Please find the tentative agenda attached.
Presentations are posted: https://ieee802.org/3/dm/public/adhoc/080724/index.html Please provide any new contributions to Jon Lewis and to the ad hoc chair by end of day Monday, August 5th, AoE.
All attendees are expected to familiarize themselves with the Working Group Policies and Procedures at
http://1.ieee802.org/rules/ before participating in the meeting (or meetings) to be held based on the present notice, and to act accordingly. By participating in this meeting (or meetings), attendees
agree to comply with all applicable laws and with the IEEE Codes of Ethics and Conduct and all IEEE policies and procedures including, but not limited to, the IEEE Patent Policy and IEEE SA Copyright and Participation Policies as provided in
https://ieee802.org/1/files/public/templates/admin-TG-intro-0324-v01.pdf. Best Max Turner (Ad Hoc Chair)
-- Max Turner, Dipl.Phys. Automotive
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