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Dear George, Dear Dayin, Dear all together, Thanks George for all this details regarding the PHY design. This is really helpful and can be it could be helpful to learn more about it. It is possible to get more basic details regarding the basic information useful to know-how about
PHYs. Any recommendation for a good book or can you make a PHY basic training for us in Berlin? As Dayin pointed out, it is very helpful for the introduction of SPE in many market segments to offer an identical user experience as users know from "standard Ethernet". Users simply want to interconnect the devices as they do today, and
they want the communication to work. If the master/slave setting, the protocol selection and possibly also PoDL settings only have to be made with SPE via DIP switches or via WEB interface, this technology will not establish itself on the market in large volumes
as we all thought. Then SPE will remain a technology for special markets such as in vehicles or special niche applications. For large volumes in the enterprise or the automation market, it will then be challenging to bring SPE into the market. We should have
this in mind. Regarding the question about PHYs that already support various protocols with AUTONEG today: We use PHY and switching chips in our switches that support 100BASE-T1 and 1000BASE-T1. To my knowledge, there are such chips from 2 manufacturers
available so far. According to our tests, these PHYs also work together when the respective ports are configured to AUTONEG. We have a test setup where this already works quite well. If it is of interest, I can bring this devices to Berlin. The passive infrastructure, such as cables and connection technology, is standardised at least for all channel lengths up to 100m, with a bandwidth of 600MHz and can therefore be used for all protocols from 10BASE-T1 to 1000BASE-T1. With
many years of experience from the successful model of structured cabling, we know that we cover at least 90% of all applications with 100m. In my point of view we have in this way the possibility to fulfil “Spectral compatibility”. In my opinion, the SPE market will scale up very quickly with the appropriate "MultiSpeed PHYs". In this sense, I consider these discussions very important and would like to take this opportunity to thank you for the very good exchange
of information and lets work on this point. Thanks a lot for this open and helpful discussion. I hope we can found a good solution for the market success. BR Matthias HARTING Electronics GmbH | Postfach 14 33, 32328 Espelkamp | Marienwerderstraße 3, 32339 Espelkamp | www.HARTING.com Von: George Zimmerman <george@xxxxxxxxxxxxxxxxxxxx>
Dayin – I tend to agree that cost effectiveness is important, and I think on new phys support for auto-negotiation is an important thing. Unfortunately, I’m not so sure that is true for old phys. I did some looking (at multiple
vendors) phy datasheets for 100BASE-T1, and did not see mentiojn of auto negotiation or multiple speed support. Some appeared to say they did not support auto-negotiation (they weren’t entirely clear), but none that I saw directly said they supported 802.3
clause 98 auto-negotiation, single-pair auto-negotiation. Therefore, the chance of any reasonable compatibility may be limi9ted. It would be good if the task force could hear about this. Regarding the implementation of a device itself, it’s not an ‘invalid idea’ and is quite common to think that commonality between a 100BASE-T1L and 10BASE-T1L phy is a major factor. However, in my experience, the commonality
usually isn’t the major factor. It is somewhat misleading to think that pam-3 is pam-3 is pam-3 and therefore they will be very compatible. If this were true, you’d have the same pam-3 levels on 100, 1000, and possibly 2.5GBASE-T – but of course you don’t.
And yet a number of vendors make multi-speed phys and they are cost effective. They do this by balancing the generalization of their dsp engines and optimizing the individual rate designs accordingly to maximize chip efficiency. Because the higher speeds
tend to be more complex, power, and area-hungry, it is important to get them as efficient as possible.
Note that because the signalling rate is something close to 10x that of 10BASE-T1L, the computation needed for a 100BASE-T1L phy will be substantially greater than the low-rate 10BASE-T1L. It will need to process signals
at something close to 10x the rate, but will also need to handle more pulse dispersion (in baud) and longer echo functions (in baud). Different degrees of parallelism would be used, and likely different filter lengths, coefficient wordlengths, and of course
substantially different timing closure. A dsp design that is efficient for one is unlikely to be efficient for the other. Similarly, the analog bandwidths are quite different, leading to different approaches and structures. These are much bigger effects
than the number of pam levels. All in all, they vary with the designer’s architectural approach and different designers may come to varying degrees of commonality, but most of the approaches I can think of and have seen lead to a situation where the necessary
controls and changes to accommodate the signal processing needs of a 10x higher rate and somewhat higher performance implementation either lead one to have an inefficient 10BASE-T1L design or a low performing 100BASE-T1L design. Generally speaking, the performance
and efficiency of the higher rate design drives the power consumption and complexity of the chip, and we should strive to optimize that. The lower rate/lower performance design will take care of itself, with different implementers taking different approaches. George Zimmerman, Ph.D. President & Principal CME Consulting, Inc. Experts in Advanced PHYsical Communications 310-920-3860 From: Dayin Xu <dyxu@xxxxxxxxxxxxxxx>
Hello Colleagues, From the technology adopter’s perspective, cost-effectiveness and less PHY chip types (note not PHY types) are crucial to the success in the market. Minimizing the PHY chip types simplify the chip selection process and potentially gains large volume and optimized cost of the PHY chip. This is what 10/100/1000 standard Ethernet chip does. Supporting Auto-Negotiation is crucial to minimize the PHY chip types. I would strongly recommend the group considering the 100BASE-T1 in the scope of the auto-negotiation objective besides 10BASE-T1L.
I would also strongly recommend the group considering the technologies used in 10BASE-T1L and 100BASE-T1 when developing the proposals for 100BASE-T1L (e.g., PAM3) so that it will not increase the difficulties in implementing
these PHY types together in a single chip if the market decides it is worthwhile to do it. I am not a PHY expert, please forgive me if this is not a valid idea. Dayin XU | 徐达银 Principal Engineer | Rockwell Automation +86-21-61288390 |
dyxu@xxxxxxxxxxxxxxx From: George Zimmerman <george@xxxxxxxxxxxxxxxxxxxx>
[Use caution with links & attachments] Matthias – (first note – I am writing this as an individual offering my experience in PHYs, not as chair) I would suggest that compatibility has (at least) three potential dimensions:
In my mind, the first 2 types are requirements. The first type is a requirement on the interference environments, and the second is covered by our objective #4 for support of optional auto-negotiation. As to the third type of interoperability, that could be the subject of a phy proposal, and I would not want to see the phy proposal analysis preceded or short-cut because of some early-market, off-application use of 100BASE-T1
PHYs. As an individual, I have personally seen several situations where technologies are sold into applications and installations that the phys were not designed for because “they worked” in early qualifications only to see
that they did not stand up to the test of time and breadth of installation conditions. Situations such as increased noise, aging, and the kinds of limiting specifications that we consider to and phy vendors design to are often not fully considered by such
implementations and installations. The result is a technology that does not scale, as even a small percentage of link failures can make for a problematic market environment. Therefore, I’d (personally) hold a high burden of proof to the third type of interoperability
above. George Zimmerman, Ph.D. President & Principal CME Consulting, Inc. Experts in Advanced PHYsical Communications 310-920-3860 From:
stds-802-3-spep2p@xxxxxxxxxxxxxxxxx <stds-802-3-spep2p@xxxxxxxxxxxxxxxxx>
On Behalf Of Fritsche, Matthias Hello together, I have a question to the group regarding the compatibility between 100BASE-T1 and 100BASE-T1L. There is already a large amount of different PHYs for 100BASE-T1 on the market and the installed base outside vehicles is also growing. Publicly published test setups also show that today's 100BASE-T1 Phys can achieve more than 100m channel
length. With the market introduction of 100BASE-T1L PHYs in the next few years, the question will certainly arise whether the 100BASE-T1 PHYs are or can be compatible with the new 100BASE-T1L PHYs? Will this be possible? I think that would be necessary from
a market and user perspective. Thanks for your feedback in advance Very nice greetings and we see us in Berlin Matthias Best regards / Mit freundlichen Grüßen
Ethernet Connectivity - HARTING Electronics GmbH | Postfach 14 33, 32328 Espelkamp | Marienwerderstraße 3, 32339 Espelkamp |
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