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[802.3_SPMD] DPLCA Hard Claiming



 

Hi Pier,

 

Can you confirm your DPLCA intentions for HARD Claim?

 

  • A DPLCA node will append 5 COMMIT ‘J’ symbols at the end of every packet.

 

  • Do *not* append 5 COMMIT symbols at the end of the last burst packet. The COMMIT symbols transmitted during the burst timer will always cause a HARD claim.

 

  • COMMIT ‘J’ symbols are transmitted during the burst_timer for 128 bit times (default) until either burst_timer_done, or the MAC finishes its inter-packet gap and starts to transmit. In either case, there are much more than 5 COMMIT symbols transmitted between burst packets. This will cause a HARD_CLAIMING to be detected.

 

  • Append_commit_timer is specified as 22 bit times. This would be 5 ½ J symbols. Should this really be 20 bit times as with the BEACON?

 

  • Detection of a HARD Claim only requires detection of two COMMIT ‘J’ symbols. This is from the PCS Receive state diagram starting in WAIT_SYNC. First ‘J’ transitions to SYNCING. Second ‘J’ transitions to COMMIT. In COMMIT rx_cmd is assigned COMMIT. In PLCA, ‘receiving’ is defined as (RX_DV = TRUE) + (rx_cmd=COMMIT). Therefore, in the DPLCA control state diagram, this will cause us to transition from EARLY_RECEIVE into RECEIVE. In the RECEIVE state we assign dplca_txop_ckaim to HARD because rx_cmd=COMMIT. Therefore it appears to me that *any* packet in which the full ‘JJHH’ preamble is detected and decoded will result a HARD claim. This does not seem right. I think we want to detect more than two ‘J’ symbols appended at the end as a HARD claim.

 

 

 

 

 

 

-- 

Tim Baggett

Technical Staff Engineer - Applications

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Microchip Technology, Inc.

Automotive Information Systems

8601 Ranch Rd 2222, Park Centre, Bldg. 3, Austin, TX 78730

Office: 512-334-8450

Tim.Baggett@xxxxxxxxxxxxx www.microchip.com

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