The other thing I noticed was KP4 (pam4) jitter was half that of KR4 (NRZ) Should we take that lead for 400 G PAM4/6/8? Sent from my iPhone On Jun 26, 2025, at 9:03 PM, Bowman, Kurtis <Kurtis.Bowman@xxxxxxx> wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
Good to know. I’m certainly not a n expert here either
From: Richard Mellitz <richard.mellitz@xxxxxxxxx>
Sent: Friday, June 27, 2025 8:49:34 AM
To: STDS-802-3-E4AI@xxxxxxxxxxxxxxxxx <STDS-802-3-E4AI@xxxxxxxxxxxxxxxxx>
Subject: Re: [802.3_E4AI] COM starting values for 400 G
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For KR4 (NRZ) we used Nb= 14
For KP4 (PAM4) we used Nb= 16
I can’t remember why though.
Which is the opposite direction of what you were suggesting below.
From: Ali Ghiasi <aghiasi@xxxxxxxxx>
Sent: Thursday, June 26, 2025 6:31 PM
To: Richard Mellitz <richard.mellitz@xxxxxxxxx>
Cc: STDS-802-3-E4AI@xxxxxxxxxxxxxxxxx
Subject: Re: [802.3_E4AI] COM starting values for 400 G
Hello Rich,
ADC ENOB is defend as = (SNDR - 1.76 dB)/6.02, furthermore SNDR and ENOB are frequency dependent. PAM4 with higher frequency will have lower ENOB, my suggestion is the following for ENOB:
Proposed RX FFE fixed taps:
In DJ we doubled the number of taps, here is my suggestion for last floating taps:
Thanks,
Ali Ghiasi
Ghiasi Quantum LLC
I put together a stake in the ground for 400 Gb/s COM so we can better analyze channels.
This not a recommendation. It’s starting point for consensus discussion. I’m not convinced the progression direction is correct for some the parameter makes sense. I can argue either way.
Comments and suggestions welcome.
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Deterministic Jitter
A_dd
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Rx ffe floating tap groups
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Last floating tap relative to the cursor
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