Re: [10GBASE-CX4] Xmt Level
Steve,
There areexisting 130nm parts that put out > 800mVppd. Our simulations
for our designs shows that this is possible. For the 90nm process a
designer can use the higher voltage fets to achieve even a 1 or 1.2V
output. Yes these fets are slower than the stnadard fets of 90nm but
they will be faster than the stnadard fets for 130nm.
Howard
"Dreyer, Steve" wrote:
>
> Howard,
>
> My comment to your comment to my comment below.
>
> Steve
>
> > "Dreyer, Steve" wrote:
> > >
> > > Howard,
> > >
> > > Took a quick look at the proposed draft and have the following
> > > top level comments:
> > >
> > > 1. The min xmt amplitude of 800mV is probably not doable on a
> > > chip with 1.2V only supply when all worst case conditions are
> > > considered, it probably needs to be dropped another 50mV
> > > or so. I plan to have a quick presentation showing
> > > this next week. For reference, the min XAUI level is
> > > a lot lower than 800mV using the far end method.
> >
> > <HAB>
> > The 800mVpp is for a differential signal so that is
> > only a 400mV single
> > ended swing at the driver output, this is attainable with a 1.2V
> > supply. Also the 800mVpp min is not the minimum the driver
> > puts out, it
> > is the minimum for the lower limit of the peak in the transmit output
> > template you reference in #3 below. This will have to be
> > clearified in
> > the text.
> > <HAB>
> >
>
> <SD>
> Our simulations show that 800mV dif pp (or 400mV single ended) can't
> be done at 1.2V when worst case conditions are put in place. We have
> simulated with both a 130nm and 90nm process.
>
> Propose we reduce the min level a bit based on these simulation to
> maybe 750mV (will have exact number next week).
>
> The 750mV is still larger than current XAUI min (if far
> end spec is used), and reducing xmt level by 50mV reduces receive
> sensitivity by 5mV, not a big impact on receive.
>
> I plan to show simulation results next week at Vancouver. Maybe we
> should wait until then to discuss further.
>
> Steve