all_files.zip 18-May-05 5545K |
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Unapproved
Meeting Minutes 23-May-05 54K |
John D'Ambrosia Brian Seemann |
Tyco Electronics Xilinx |
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Agenda and General Information 18-May-05 467K |
Adam Healey | Agere Systems | |||
Meeting Agenda Spreadsheet (*.xls) 14-May-05 21K |
Adam Healey | Agere Systems | |||
Editor's Report 16-May-05 49K |
Schelto van Doorn | Intel | |||
Comments Received Against Draft 0.9 12-May-05 174K |
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Responses to Comments Received Against Draft 0.9
*new* 06-Jun-05 195K |
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Channel Model Ad Hoc Report 14-May-05 242K |
Charles Moore |
Agilent | |||
Improved HVM ATCA Models Update 14-May-05 712K |
Bill Peters | Intel | |||
Informative Model Methodology Update 14-May-05 662K |
John D'Ambrosia Rich Mellitz |
Tyco Electronics Intel |
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Channel Model Correlation
Update and Trends 14-May-05 506K |
Rich Mellitz | Intel | |||
KX & KX4 Informative Channel Models |
John D'Ambrosia Rich Mellitz |
Tyco Electronics Intel |
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Root Power Sum of Energy
Integrals 14-May-05 430K |
Charles Moore | Agilent | |||
AN Data Detect
Timer Values |
Andre Szczepanek | TI | |||
An Eye on Return Loss: The Mathematical and
Real Implications of RL Specs |
Rich Mellitz | Intel | |||
Improved ATCA Channel Equalization Analysis with Package Impacts 14-May-05 164K |
Xiao-Ming Gao | Intel | |||
Bit
Error Distribution on a DC-Coupled Backplane Channel 14-May-05 995K |
Andre Szczepanek | TI | |||
DFE
Error Propagation Spreadsheet Introduction DFE Error Propagation Spreadsheet (*.xls) (16-May-05, 136K) |
Andre Szczepanek | TI | |||
Simulated DFE Error Propagation Results for Intel Channels 14-May-05 87K |
Andre Szczepanek | TI | |||
DFE
Coefficient Constraints 14-May-05 56K |
Andre Szczepanek | TI | |||
Receiver Interoperability Testing 14-May-05 389K |
Joe Abler | IBM | |||
Digital Signal Detect 14-May-05 74K |
Pat Thaler | Agilent | |||
Transmitter Compliance Criteria 17-May-05 295K |
Justin Gaither | Xilinx | |||
10GBASE-KR Transmit Equalizer Requirements 14-May-05 841K |
Adam Healey | Agere Systems | |||
10GBASE-KR Transmitter Compliance Methodology Proposal Compliance Matrix Spreadsheet (17-May-05, 54K) |
Rob Brink | Agere Systems | |||
Proposal for Enhancements to the 10GBASE-KR Start-Up Protocol 14-May-05 191K |
Rob Brink | Agere Systems | |||
Tx/Ch/Rx Methodology 18-May-05 42K |
Tom Palkert | Xilinx | |||
10GBASE-KR Transmitter Compliance Methodology
Proposal and Modifications to the Start-Up Protocol 18-May-05 347K |
Rob Brink Justin Gaither Brian Seemann Brian Brunn Charles Moore Fulvio Spagna |
Agere Systems Xilinx
Agilent Intel |
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Last Update: 06 Jun 05