IEEE 802 P802

IEEE P802.3bs 200 GbE & 400 GbE Task Force


  Plenary Meeting Material
Mar 2017, Vancouver, BC, Canada

Meeting Materials

All Files
 24-Mar 17  (8.1M)

General Information

Agenda and General Information
 12-Mar 17 (305k)
John D'Ambrosia Futurewei, subsiary of Huawei
Chief Editor's Opening Report
  11-Mar-17 (60k)
Pete Anslow Ciena
Chief Editor's Closing Report
  16-Mar-17 (133k)
Pete Anslow Ciena
Logic Ad hoc
   09-Mar-17  (88k)
Mark Gustlin Xilinx
SMF Ad Hoc
   09-Mar-17 (17k)
Pete Anslow Ciena
Electrical Interface Ad hoc
   09-Mar-17 (240k)
Andre Szczepanek InPhi
Logic Track Closing Report
    15-Mar-17 (65k)
Mark Gustlin Xilinx
Optical Track Closing Report
    15-Mar-17 (60k)
Pete Anslow Ciena
Electrical Track Closing Report
   15-Mar-17 (21k)
Andre Szczepanek InPhi
IEEE 802.3 Opening Report
   16-Mar-17 (33k)
John D'Ambrosia Futurewei, subsidiary of Huawei
IEEE 802.3 Closing Report
   24-Mar-17
John D'Ambrosia Futurewei, subsidiary of Huawei
Approved Meeting Minutes
  30-May-17 (150k)
John D'Ambrosia Futurewei, subsidiary of Huawei

Liaisons & Communications

OIF to IEEE P802.3bs and P802.3cd regarding progress on OIF CEI-56G-VSR-PAM4 project
Attachment (Password protected)
Nathan Tracy TE Connectivity
Proposed Liaison to T11.2
     24-Mar-17
Updated per Task Force Discussion
Proposed Liaison to OIF
     24-Mar-17
Updated per Task Force Discussion  
Proposed Liaison to ITU-T SG15
     24-Mar-17
Updated per Task Force Discussion  
     

Meeting Presentations

Comments #7, 92, 102, 160: 4 Lanes Muxing Limited Clock Content Analysis
    09-Mar-17 (537k)
Oded Wertheim Mellanox
Comment #7- Possible Solutions for Clock content Issue
  09-Mar-17 (95k)
Mark Gustlin Xilinx
Comment #7-Text for 7bit scrambler solution
   09-Mar-17 (360k)
Mark Gustlin Xilinx
Comment 7: Restricted PMA muxing (option B): proposed changes to the Draft
   12-Mar-17 (159k)
Mark Gustlin
Gary Nicholl
David Ofelt
Kapil Shrikhande
Xilinx
Cisco
Juniper
Innovium
Comments: 34, 74, 75: Differential Return Loss for Annex 120d   
   09-Mar-17 (943k)
Rich Mellitz Samtec
Comment 57, 58: Making individual lane Tx OFF spec manufacturable.
   09-Mar-17 (227k)
Jonathan King Finisar
Comment 59 - TDECQ update
   09-Mar-17 (296k)
Jonathan King Finisar
Comments 66, 80, 100, 124, 125: 8 lane compliance boards
   15-Mar-17 (1M)
Tom Palkert Molex
Comment #66, 77, 78, 80, 94, 95, 100, 124: Chip to Module Simulations and the effect of crosstalk
   09-Mar-17 (1.25M)
Mike Dudek Cavium
Comments: 77, 78, 94-97, 98: Addressing the Gap in the C2M Specifications
  12-Mar-17 (1.2M)
Ali Ghiasi Ghiasi Quantum
Comment #84- FEC Degrade Signaling
   09-Mar-17 (297k)
Steve Trowbridge
Mark Gustlin
Dave Ofelt
Gary Nicholl
Jeff Slavick
Pete Anslow
Nokia
Xilinx
Juniper
Cisco
Broadcom
Ciena
Comment 91: Chip-to-module far-end TX eye measurement proposal
   15-Mar-17 (443k)
Adam Healey
Raj Hegde
Broadcom
Comments: 92, 93: Impact of Clock Content on the CDR with Propose Resolution
   12-Mar-17 (767k)

    
Ali Ghiasi
Phil Sun
Xiang He
Xinyuan Wang
Ghiasi Quantum
Credo
Huawei
Comments 109, 130, 133, 145: Improved SSPRQ pattern for testing optical transmitters
   15-Mar-17 (165k)

     Associated CSV file
Piers Dawe Mellanox

Late Presentation Requests

Comments 109, 130, 133, 145: Characteristics of pattern in dawe_3bs_01_0317
  12-Mar-17 (112k)
Pete Anslow Ciena
Comment #7-Text for 7 bit scrambler solution
   12-Mar-17 (98k)
Pete Anslow Ciena
Comment 7: Restricted Muxing Update
   12-Mar-17 (159k)
Mark Gustlin
Gary Nicholl
David Ofelt
Kapil Shrikhande
Steve Trowbridge
Xilinx
Cisco
Juniper
Innovium
Nokia
     
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Last Update: 30-May-2017