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Venkat – good question – unfortunately, the answer is a bit lousy - implementation of ANY MDIO registers as an interface is optional in IEEE Std 802.3. That is why you will see text like the following, which provides for equivalent functionality (e.g., pins) for various functions if MDIO registers are not implemented. “If MDIO is not implemented a similar functionality shall be provided by another interface. If MDIO is not implemented a similar functionality shall be provided by another interface.” “Generated by the management interface (or equivalent functionality if MDIO is not implemented).” Or, something like, “The PCS shall be placed in loopback mode when the loopback bit in MDIO register 3.0.14, defined in
45.2.3.1.2, is set to a one (or PCS loopback mode is enabled by a similar functionality if MDIO is not implemented)” 802.3cg only implemented clause 45 registers, as the clause 22 register space is full. It is the style for much of the BASE-T1 PHY functionality to have duplicate bits in the 1.22xx register space as are
in the generic ethernet (1.0x) register space. Since all registers are optional, which registers you will want to implement in a chip will largely be up to the desires of your target users. I’m sorry that the answer isn’t more definitive, but I hope this helps. -george From: Venkat Iyer <Venkat.Iyer@xxxxxxxxxxxxx> Hi, I was looking at draft 2.0 and have a question re. which control and status registers are to implemented for 10BASET1S. The description of 1.2299 (PMA control) says that reset could be done by setting 1.2299.15 or 1.0.15.
There are similar references to other registers e.g. 12299.14 and 1.9.0. Does such cross reference mean that both registers must be implemented ? Also the draft does not reference any clause 22 (MIIM) registers. So can I assume that these don’t need to be implemented. Venkat Iyer 512 427 0253 To unsubscribe from the STDS-802-3-10SPE list, click the following link:
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