| Thread Links | Date Links | ||||
|---|---|---|---|---|---|
| Thread Prev | Thread Next | Thread Index | Date Prev | Date Next | Date Index |
|
Yong – You seem to be thinking of implementations of echo cancelled ethernet PHYs with completely internal hybrid (2-wire to 4-wire converter) circuitry. The implementations shown use some external components for the hybrid. For more information
on this specific scenario, please see
http://www.ieee802.org/3/cg/public/Mar2017/Graber_3cg_04_0317.pdf or contact Steffen Graber directly. George A. Zimmerman, Ph.D. President & Principal Consultant CME Consulting, Inc. Experts in PHYsical Layer Communications 1-310-920-3860 From: Yong Kim <yongkim.mail@xxxxxxxxx> Hi all, Just noticed that 10BASE-T1L IC is shown with 4 pins in support of TX+, TX-, RX+, RX- and four separate white boxes (termination). This is in informative annex (intrinsically safe app). At best, this is confusing. Logically, it should show combo TX/RX+ and TX/RX-, or two pins.
Is there something I am totally missing (and therefore cannot make sense of this illustration)? Whoever is knowledgeable, *please* educate me. Thanks! best regards, Yong Kim, affiliation: NIO To unsubscribe from the STDS-802-3-10SPE list, click the following link:
https://listserv.ieee.org/cgi-bin/wa?SUBED1=STDS-802-3-10SPE&A=1 To unsubscribe from the STDS-802-3-10SPE list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=STDS-802-3-10SPE&A=1 |