Re: [HSSG] 40G MAC Rate Discussion
Marcus,
Everyone proposing 40 Gig (or at least all those that I have had contact
with) is proposing 4 lanes using the same PCS as most 10x10G proposals:
10GBASE-R - therefore 64b/66b encoded. I expect any exposed serial
electrical interface would also be 10GBASE-R based - again similar to
many of the 100 G proposals but 4 wide instead of 10 wide.
My preference would also be to use the same multiplexing mechanism for
distributing the traffic to the lanes for both 100 Gig and 40 Gig. There
are at least a couple of proposals out there for multiplexing and I see
no reason why they couldn't be used for both speeds.
Given that the market is data center, I think a parallel optical
interface could be appropriate which would allow using an existing 10
Gig optical PHY as is though I don't think we have gotten to discussions
yet of that vs. wavelength multiplexed.
Regards,
Pat
-----Original Message-----
From: Marcus Duelk [mailto:duelk@ALCATEL-LUCENT.COM]
Sent: Friday, April 06, 2007 7:18 AM
To: STDS-802-3-HSSG@listserv.ieee.org
Subject: Re: [HSSG] 40G MAC Rate Discussion
Hi everyone,
I have a question regarding a possible PCS implementation of 40GbE. To
my knowledge the block code is chosen according to the PMD
configuration, i.e. a 4-lane PMD will most likely use a different PCS
than a 10l-lane PMD or a serial PMD.
For 40GbE we have been arguing that the prime candidate would be 4x10G.
Looking at 10GBase-LX4 I could imagine that the PCS of choice is 8B/10B.
This would, however, result in 12.5 Gb/s per lane. Is that a reasonable
assumption or are there any reasons that 4x10G could use the same PCS as
10x10G (e.g. 64b/66b) ?
thanks
marcus
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Marcus Duelk
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