Re: [8023-POEP] What's the max voltage drop thru a midspan?
Steve,
I think that you have hit upon another assumption or limitation that we
should state in .at. When 175mA/conductor current was established for
.af, I heard there was a lot of discussion about whether patch panels
could carry this current. I believe that your complaint is valid, but
applies to all aspects of .at that use equipment and infrastructure that
were not necessarily designed for .at.
I believe that we should make the basic assumptions for the standard
clear - perhaps in an addendum. This will at least form the basis for
discussion at the individual installation level.
Examples of existing limitations are:
Operate from conformant CAT3 or better
Intra-pair resistance balance limitations
Some form of temperature derating for cabling plant (from 60C
ambient)
Patch panels and midspans must be designed to carry the current
Compliance with structured cabling standards (or subsets
thereof)
Compatibility limited to compliant .af equipment
...
While I think that the point is moot, it is unlikely that midspans,
which are basically power supplies, were designed with 1/2oz planes and
5 mil traces. My guess is 2oz finished with 10 - 12mil traces and 1 oz
internal planes if they even used multilayer boards. Almost all of the
temperature rise calculators are useless for all but isolated, straight
traces. The inner layer graphs from IPC were just generated from outer
layer graphs with a derating of 2 or 4 (I forget). Most of the online
calculators are based on the IPC graphs. Power dissipation by devices
on the board also changes the temperature drastically. Adding a lot of
copper to the board and inner layers drastically reduces the actual
temperature profiles. IPC data usually results in very conservative
trace sizing. Don't count much on controlled impedance traces - in my
experience most board designers pay little attention.
That being said, there are few limits to how poorly an individual piece
of equipment may have been desinged.
Regards,
Martin
Martin Patoka
Systems Engineer
Texas Instruments
214-567-5487
mpatoka@xxxxxx
-----Original Message-----
From: owner-stds-802-3-poep@xxxxxxxx
[mailto:owner-stds-802-3-poep@xxxxxxxx] On Behalf Of Steve Robbins
Sent: Monday, June 12, 2006 12:37 PM
To: STDS-802-3-POEP@xxxxxxxxxxxxxxxxx
Subject: Re: [8023-POEP] What's the max voltage drop thru a midspan?
Chad,
Unfortunately, there was no reason for midspan designers to route these
traces on outer layers, since they were not told they had to carry
current on them.
I wouldn't be surprised if some routed these traces on internal layers,
which have 0.5oz weight (0.7mils thick). Furthermore, if they routed
them as closely-coupled pairs then the widths may be as narrow as 4 mils
(depending on stack up).
What would be the temp rise in this case? I don't have the graphs,
since I don't work at Ixia anymore.
But speculation about temp rise in the traces may be pointless. We
didn't spec a current rating in 802.3af, so I don't see how we can write
802.3at assuming this path can carry significant current.
Steve
-----Original Message-----
From: owner-stds-802-3-poep@xxxxxxxx
[mailto:owner-stds-802-3-poep@xxxxxxxx]
On Behalf Of Chad Jones (cmjones)
Sent: Monday, June 12, 2006 10:26 AM
To: STDS-802-3-POEP@xxxxxxxxxxxxxxxxx
Subject: Re: [8023-POEP] What's the max voltage drop thru a midspan?
Martin summarized it well by stating that the midspan would have to
carry the endspan currents in one of these (not recommended)
installations. Unfortunately, that means that legacy midspans may have
only been tested to carry 350mA - if this was tested at all.
On the flip side, 800mA flowing through a 5 mil trace of 1oz Cu on an
external layer will only result in a 17C temperature rise. I am
assuming that these traces are on an outer layer and that most people
use 1oz Cu on outer layers and that most traces are 5 mils or larger.
-Chad
-----Original Message-----
From: owner-stds-802-3-poep@xxxxxxxx
[mailto:owner-stds-802-3-poep@xxxxxxxx] On Behalf Of David Law
Sent: Monday, June 12, 2006 11:35 AM
To: STDS-802-3-POEP@xxxxxxxxxxxxxxxxx
Subject: Re: [8023-POEP] What's the max voltage drop thru a midspan?
Hi Steve,
I see your point but the text states that the Mid-span 'shall not alter
the transmission requirements of the permanent link.' so it really
depends if the DC Current carrying capacity and the Resistance are
considered 'transmission requirements' or not.
Regards,
David
owner-stds-802-3-poep@xxxxxxxx wrote on 12/06/2006 16:00:15:
> David,
> Unfortunately I don't think this text solves the problem. My
interpretation
> is that it does the following:
> 1. The midspan must pass data thru it without degrading data
integrity.
> 2. As the midspan injects power on the spare pares, it must block
> that power from going back to the endspan.
> So it doesn't say anything about passing power thru on the data pairs.
> Steve
> -----Original Message-----
> From: owner-stds-802-3-poep@xxxxxxxx
[mailto:owner-stds-802-3-poep@xxxxxxxx]
> On Behalf Of David Law
> Sent: Monday, June 12, 2006 3:46 AM
> To: STDS-802-3-POEP@xxxxxxxxxxxxxxxxx
> Subject: Re: [8023-POEP] What's the max voltage drop thru a midspan?
> Hi Steve,
> Do you think the following text contained in the third from last
paragraph
> of subclause 33.4.8 'Midspan PSE device additional requirements' of
> IEEE Std 802.3-2005 covers what you are looking for:
> ---oo000oo---
> Configurations with the Midspan PSE in the cabling channel shall not
alter
> the transmission requirements of the "permanent link." A Midspan PSE
> inserted into a channel shall provide continuity for the signal pairs.
> A Midspan PSE shall not provide DC continuity between the two sides of
> the segment for the pairs that inject power.
> ---oo000oo---
> Regardless, I agree that the IEEE 802.3at specification will need to
> be written carefully to ensure that, for example, it doesn't
retrospectively
> place a higher current carrying requirements on existing IEEE Std
> 802.3-2005 compliant Mid-Span PSEs.
> Regards,
> David
>
> owner-stds-802-3-poep@xxxxxxxx wrote on 10/06/2006 05:34:39:
> > Guys,
> >
> > As you all know, we're planning to run current from the endspan thru
the
> > midspan in a 4P system.
> >
> > Although I think its unlikely that we'll see Af-midspans with fused
> traces
> > or delaminated boards, technically we can't prove that it won't
> > happen because 802.3af doesn't specify a min current rating for this
path.
> There
> > seems to be no max limit for dc resistance either. (If these specs
are
> in
> > 802.3af and I've missed them, then someone please point me to the
> applicable
> > table or paragraph.)
> >
> > We should make sure 802.3at specifies both these parameters. (But
only
> for
> > midspans that output >15.4W so we're not retroactively putting new
> > requirements on Af-midspans.)
> >
> > Any comments?
> >
> > Steve
> >
> > [attachment "C.htm" deleted by David Law/GB/3Com]