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Re: Potential heating problem




Stirling,

To understand your figures. Your traces are 1.4 mils thick because they
are internaland have no overcoat, correct?. The traces are 10 mils wide
but how long and how much space between traces. 

By my calculations, your traces have about .75 ohms per foot. I get .43
ohms from your stated voltage drop and the current.So the total length
of your traces is about 6.9 inches. Am I in the ball park?

With your total of 2.95 Watts, the equivalent surface are is about 5.4
sq in. with your 60 degree C over ambient, However, you say the surface
temperature is 90 to 107. How can the surface temperature be higher than
the temperature source, namely the PC traces. Please explain 

Jack Andresen
****************************
Sterling Vaden wrote:
> 
> I have been running a little informal test of current carrying capacity. I
> am currently (get it) running 2.6 Amperes through a pair of traces (.010 X
> .0014) wired in series, embedded in the inner layers, one directly above the
> other, of the test board shown. The temperature rise is approximately 60
> degrees C over ambient yielding 98 to 107 C as measured on the surface of
> the pcb. No discoloration of the board material has been noted.  The traces
> are dissipating 1.138 X 2.60 = 2.96 W. No catastrophic failure has been
> noted.
> 
> Now. I predict that if traces are failing at .250 A, those must be small
> traces indeed!
> 
> Sterling Vaden
> 
> Dave Dwelley wrote:
> 
> > Do these miniature traces affect our 20 ohm wiring budget?
> >
> > What's the typical DC resistance of a patch panel?
> >
> > Dave Dwelley
> >
> > Jack Andresen wrote:
> >
> > >But let me go back to original issue. I have looked at many patch panel
> > >PC boards and for various reasons, the traces run from 10 to 18 mils.
> > >Possible reasons:
> > >1) Making pairs of traces 100 ohm. 2) Trying to get between the RJ45
> > >pins. 3) Running a pair between the 110 punch down pins. 4) In general,
> > >there is very little space for both compensation and wiring while
> > >leaving margins between pairs of traces. 5) People are afraid of too
> > >fine traces
> > >But it is important to recognize here is no general standard for patch
> > >panel traces (as pointed out in one of the responses).
> 
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>                              Name: pcbCurrentCapacity.doc
>    pcbCurrentCapacity.doc    Type: Winword File (application/msword)
>                          Encoding: base64