RE: insuring the stability of power delivery
Gerard, Yair, and all:
My only concern in this message string is with Item #3 (Charge-Up time for a
470uF capacitor). If foldback current limiting is to be allowed during
start-up as a means of reducing peak MOSFET power dissipation, I would
recommend lengthening the time allowed for charging a 500uF nominal
capacitor to:
T = (C x V)/I = (470uf x 1.2)(44V)/0.10A = 248ms = 250ms maximum.
Comments are appreciated...
Peter Schwartz
Applications Engineer
Micrel Semiconductor
Phone: 408.435.2460
FAX: 408.456.0490
peter.schwartz@xxxxxxxxxx
-----Original Message-----
From: Gérard Vergnaud [SMTP:gerard.vergnaud@xxxxxxxxxxxxxxxxxx]
Sent: Sunday, June 03, 2001 14:04
To: Yair Darshan
Cc: stds-802-3-pwrviamdi@xxxxxxxx
Subject: Re: insuring the stability of power delivery
Yair and all,
I closely agree with the Yair statement :
1) The PD cap size needs to be limited
I think, as Yair, that the only need is to limit
the PD input cap
with a value less than 470µF. With this value I
agree, we
will cover more than 95% of the applications. If
any PD
need more than 470µF, we have to specify the inrush
current limiting will have to be taken into acoount
at the PD side.
2) The DC/DC must be held off until the cap is
charged
Sure, DC/DC converter must not start before the cap
get a
sufficient charge level. But, as Yair said, this
function is most
of time provided by PWM chip.
3) The startup/charging time needs to be limited
I completely agree with Yair statement, I'm thinking
that with an input cap less than 470µF the start-up
time
for a PD should easily less than 100ms.
Yair Darshan a écrit :
Brian and all,
see my comments below.
Thanks
Yair.
===================================================================
[Brian Lynch] I agree that during startup (Inrush in
the PSE; when
the
input drops to zero when the PD switch closes and
then increases as
the PD bulk charges) that this is not an
oscillation.
The problems I saw with the technique were that to
insure startup:
1) The PD cap size needs to be limited
2) The DC/DC must be held off until the cap
is charged
3) The startup/charging time needs to be
limited
4) The PD needs energy storage to hold on
the switch when
the input goes away.
Yair Darshan: The problems you saw when the inrush
current is in the
PSE are actually not a real problems and I try to explain
why:
Correct, the input cap needs to be limited.
There is no need for higher cap than 470uF for more
than 95% of the
applications that we see using the Power over MDI
technology. Standard
switching power supply working at 100Khz and supporting
12-15W can work well
with 470uF at their input with large margin.
This statement is tested and verified in the field
many times.
Other applications that needs more than 470uF will
be supported by
the PD inrush current limiter.
The point is that there is no reason to increase the
PD cost for for
95% of the application while we have the hardware to do this
function in the
PSE for protection, current sensing switching the port to
off etc.
2) The DC/DC must be held off until the cap
is charged
Correct, however, you need to do it anyway if you
want to increase
your design reliability by preventing the power supply from
turning on at
low voltage and drawing much more current that it needs.
I=P/Vin, P is
constant....
You need this function to ensure startup and working
on the stable
region as I showed in earlier presentations.
Most of the commercial PWM controllers have the UVLO
function any
way for the above reasons.
3) The startup/charging time needs to be
limited
Why it is a problem? In light of May discussion it
seems that we
want to decrease the time for single port insertion and this
is one of the
components that sets this time.
If for special application we want to have more
time, its fine, add
the inrush current at the PD, however it is not the problem
of 95% of the applications.
In standard DC/DC supply for 12-15W with 470uF max
at its input the
total charging time is around 50mSec and the power supply
startup time is
10-30mSec thus the PD can be fully functional within 100mSec
max.
4) The PD needs energy storage to hold on
the switch when
the
Correct, add 0.1uF between the gate and source of
the Isolating
mosfet switch and utilize the high impedance of Mosfet gate
to have long memory effect. (I have circuit that is
working and
tested in the lab, I can send it to you if you want)
(The inrush current limiter that you want to add to
the PD contains
much more components than the needed to solve the storage
time issue)
Brian:
My thoughts are that even though we can put limits
on these
parameters in
the spec, they are four parameters that are not
needed if inrush
limiting
is put in the PD.
We have limits all the time, and limits on the
design are needed
even if the inrush current limiter is in the PD.
And the reasons are:
1) The PD cap size needs to be limited :
The inrush current limit set point is needed to be
calculated
according to the PD power supply input capacitor along with
the the PD power
supply normal operating current right after startup.
Otherwise you will have
startup problem.
You can argue this statement by saying, that in your
application or
model you haven't noticed that problem, and it could be true
for a specified sets of parameters... but not for
any set of
parameters.
The bottom line is that you move the definitions and
limitations to
the PD box instead of to the System definitions.
I prefer the system definitions and not complicating
the PD in order
to make it simple and low cost.
2) The DC/DC must be held off until the cap
is charged
In many power topologies and/or applications, you
need to do it
regardless if the inrush limiter is in the PD.
3) The startup/charging time needs to be
limited
If you need long startup for some reason you can add
the hardware to
the PD to get it. However it is not a drawback for 95% of
the applications.
Brian:
The only conceptual issue I see with inrush limiting
in the PSE is
that if the PD is not capacitive at its input, there
could be
oscillation
on the cable. A non capacitive input is unlikely,
but possible if
the PD
does not have a DC/DC converter input stage.
95% of the applications are with capacitive input
since they have
DC/DC.
Why we should care for the 5%.
In any case we cant spec. for 100% of the
applications (the known
today and the future) since it will not be a cost effective
solutions.
===================================================================
{Brian Lynch] In my simulations, I could put in
components which
would make the system fail to start. Only by putting
in extra
constraints on component values could I guarantee
startup.
Isn't it a normal design procedure that any design
will fail with
some set of numbers and will work perfectly with other set
of numbers? I am
sure that if you put the inrush current limit in the PD, it
will fail for a
some set of numbers.
From the experience that we gathered from the field,
for the case
that the inrush current was in the PSE, the PD designers
find that it is
easy to design the PD power supply if they know the energy
source parameters
during startup and during normal operating mode and the only
limitations
that they have on the PSE and PD where:
PSE side:
1. Max. available power during normal operating
mode.
2. Voltage range
3. Max. average current at the lowest line possible.
4. Peak current and time from the PSE during
startup.
PD side:
4. Max. PD input cap
5. Turn on and turn off voltages
Very simple and it works always.
I agree that for very large PD input capacitor the
Inrush current
limit should be in the PD, and we already agree to this
concept in St Louis.
We need to close the value of this capacitor in which it
consider to be
large capacitor.
======================================================================
> -----Original Message-----
> From: Lynch, Brian [SMTP:brian_lynch@xxxxxx]
> Sent: ?, ???? 01, 2001 4:51 PM
> To: 'Yair Darshan'; 'Dave Dwelley'; Lynch, Brian; 'Rick
Brooks';
> stds-802-3-pwrviamdi@xxxxxxxx
> Subject: RE: insuring the stability of power delivery
>
> All,
>
> See below
>
> Brian
>
> >-----Original Message-----
> >From: Yair Darshan [ mailto:YairD@xxxxxxxxxxxxxx
<mailto:YairD@xxxxxxxxxxxxxx> ]
> >Sent: Thursday, May 31, 2001 10:18 PM
> >To: 'Dave Dwelley'; Lynch, Brian; 'Yair Darshan'; 'Rick
Brooks';
> >stds-802-3-pwrviamdi@xxxxxxxx
> >Subject: RE: insuring the stability of power delivery
> >
> >
> >Dave,
> >See my comments below.
> >Yair.
> >
> >
> >> -----Original Message-----
> >> From: Dave Dwelley [SMTP:ddwelley@xxxxxxxxxx]
> >> Sent: ?, ??? 31, 2001 11:52 PM
> >> To: Lynch, Brian; 'Yair Darshan'; 'Rick Brooks';
> >> stds-802-3-pwrviamdi@xxxxxxxx
> >> Subject: RE: insuring the stability of power delivery
> >>
> >> This is a new wrinkle! I'm not a distributed power
supply
> >designer, but
> >> I'll take a stab at this anyway. Shout me down if I
don't
> >know what I'm
> >> talking about.
> >>
> >> At 11:02 AM 5/31/2001 -0400, Lynch, Brian wrote:
> >> >In our work with power systems, we have found that to
insure
> >> >stability of a system, the closed loop output
impedance of the
> >> >sourcing supply must be lower than the closed loop
input impedance
> >> >if the load power supply over the frequency band and
voltages
> >> >of interest. This concept is also discussed and taught
at various
> >> >universities. VPI and MIT are two I have direct
knowledge of.
> >>
> >> I see this as two problems - startup and steady state.
> >>
> >> In startup, the output impedance of the PSE power
supply is
> >what it is,
> >> and
> >> the input impedance of the PD appears in series with
> >whatever is doing the
> >>
> >> inrush limiting, be it in the PSE or the PD. The PSE
power
> >supply isn't
> >> likely to oscillate in this case. The line voltage is
> >another matter -
> >> presumably if the limiter was in the PSE, the line
voltage
> >could oscillate
> >>
> >> (by Brian's theory);
> > [Yair Darshan] I do not agree to this assumption.
If
> >the limiter is
> >in the PSE, the PD input voltage can go to zero for some
time
> >and then ramp
> >again.
> > This is not an oscillation it is a normal short
circuit
> >condition
> >when a voltage source is applied to a discharged
capacitor.
> > With other simple implementation of the isolating
switch, you
> >prevent this condition. In any case this condition is not
a problem.
> > The case I present here was tested and confirmed in
lab and also
> >with simulations. I think (and we need to check with
Brian) that he had
> >implementation problem and not a conceptual problem.
>
> [Brian Lynch] I agree that during startup (Inrush in the
PSE; when the
> input drops to zero when the PD switch closes and then
increases as
> the PD bulk charges) that this is not an oscillation. The
problems I saw
> with the technique were that to insure startup:
> 1) The PD cap size needs to be limited
> 2) The DC/DC must be held off until the cap is
charged
> 3) The startup/charging time needs to be limited
> 4) The PD needs energy storage to hold on the switch
when the
> input goes away.
>
> My thoughts are that even though we can put limits on
these parameters in
> the spec, they are four parameters that are not needed if
inrush limiting
> is put in the PD.
>
> The only conceptual issue I see with inrush limiting in
the PSE is
> that if the PD is not capacitive at its input, there could
be oscillation
> on the cable. A non capacitive input is unlikely, but
possible if the PD
> does not have a DC/DC converter input stage.
>
===================================================================
>
> >> if it was in the PD, the line would stay quiet, but
> >> the node inside the PD between the inrush-limiting pass
> >device and the
> >> input of the PD supply could oscillate. The PD designer
can
> >beat this by
> >> holding the switcher inactive until the input cap has
> >reached its final
> >> value, or by balancing impedances properly.
> > [Yair Darshan] Again, in my opinion you are
discussing
> >a problem
> >that is not exist. Can any body send a detailed circuit
> >showing a problem ?
> {Brian Lynch] In my simulations, I could put in components
which
> would make the system fail to start. Only by putting in
extra
> constraints on component values could I guarantee startup.
>
======================================================================
> >