[802.3af] FW: BOUNCE stds-802-3-pwrviamdi@majordomo.ieee.org: Message too long (>100000 chars)
Hi all,
Attached my home work from July 2001.
Sorry for the delay.
You can find the file contains the data at:
http://www.ieee802.org/3/af/public/documents/PSE_PD_stability_analysis_draft
.pdf
Short description of the document:
It is a short summary of the subject (8 pages). It was extracted from 26
pages of presentation that I plane to present in Sep. meeting.
In order to speed up discussion on the subject I have summarized the
important topics and conclusions.
Page 3:
Description of all system segments that might affect the stability issue.
Starting from left to right: The PSE main power supply connected to the port
through Rpse, C1 which represents the port control hardware+inrush current
limit.
Since we are discussing Normal Powering Mode, the Inrush current limit is at
on mode, hence modeled by simple resistor, Rpse.
Zo1 is the main power supply output impedance.
Zo_pse is the PSE port output impedance.
The PSE output port is connected to a cable modeled by low frequency
components and connected to PD input port.
At the PD input we can see C2 which is the small cap 50-100nF and the PD
inrush current limiter which is at on mode and modeled by Rpd.
An EMI filter is buffered between the PD input to the DC/DC converter input.
The DC/DC converter input is not include the big cap at its input. This
capacitor is part of the EMI filter and marked as CS2.
The output of the EMI filter is designated by its output impedance Zo_pd
without the effect of the DC/DC converter input impedance, Zin.
Zin is the DC/DC converter input impedance.
The trick here is to play with the impedances in order to ensure one basic
requirement: Zo_pd must be well below Zin.
Due to the fact that Zo_pd can have many forms pending of Zo1, Zo_pse, and
the cable length, I have specified the worst case conditions and derived the
requirements
according to those conditions and ensuring that for all the other cases it
will be the easier case.
Page 4: Description of the problem and its origin.
Page 5: Description of the impedance allocation map and the numbers required
to ensure stability and PSE-PD inter operate.
Worst case analysis shows that the worst case from small signal stability
point of vie is when the cable is short.
In this case we have the largest quality factor whenever we have LC
circuits.
Under the above conditions the EMI filter output impedance can increase to a
level that it is changing the original PD DC/DC transfer function and change
its original dynamic behavior and may introduce marginal stability at the
EMI filter resonance frequency and/or the PSE output filter.
Page 6: Proposed requirements from the PD.
Page 7: Proposed requirements from PSE.
Page 8: Requirements summary at full load condition marked on the system
various segments.
Please review the proposal and start comment on it in order to close this
issue.
Thanks
Yair.
> -----Original Message-----
> From: David Law [SMTP:David_Law@xxxxxxxxxxxx]
> Sent: в, аевеси 21, 2001 5:29 PM
> To: Yair Darshan
> Subject: Re: BOUNCE stds-802-3-pwrviamdi@xxxxxxxxxxxxxxxxxx: Message
> too long (>100000 chars)
>
>
>
> Hi Yair,
>
> As usual the attachment was too large for the reflector and was bounced. I
> have
> now placed the file on the web site at the URL -
> http://www.ieee802.org/3/af/public/documents/PSE_PD_stability_analysis_dra
> ft.pdf
> so if you could re-send your e-mail referencing this URL I would be
> grateful.
>
> Thanks very much,
> David Law
>
>
>
>
>
>
>
>
> owner-stds-802-3-pwrviamdi@xxxxxxxxxxxxxxxxxx on 19/08/2001 19:16:55
>
> Sent by: owner-stds-802-3-pwrviamdi@xxxxxxxxxxxxxxxxxx
>
>
> To: owner-stds-802-3-pwrviamdi@xxxxxxxxxxxxxxxxxx
> cc: (David Law/GB/3Com)
> Subject: BOUNCE stds-802-3-pwrviamdi@xxxxxxxxxxxxxxxxxx: Message too
> long
> (>100000 chars)
>
>
>
>
> From owner-stds-802-3-pwrviamdi@xxxxxxxx Sun Aug 19 14:16:44 2001
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> 14:16:44
> -0400 (EDT)
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> From: Yair Darshan <YairD@xxxxxxxxxxxxxx>
> To: "'stds-802-3-pwrviamdi@xxxxxxxx'" <stds-802-3-pwrviamdi@xxxxxxxx>
> Subject: PSE- PD Stability Analysis -My home work from July 2001
> Date: Sun, 19 Aug 2001 21:14:19 +0200
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>
> Hi all,
>
> Attached my home work from July 2001.
> Sorry for the 4 days delay.
>
> Short description of the document:
> It is a short summary of the subject (8 pages). It was extracted from 26
> pages of presentation that I plane to present in Sep. meeting.
> In order to speed up discussion on the subject I have summarized the
> important topics and conclusions.
>
> Page 3:
> Description of all system segments that might affect the stability issue.
>
> Starting from left to right: The PSE main power supply connected to the
> port
> through Rpse, C1 which represents the port control hardware+inrush current
> limit.
> Since we are discussing Normal Powering Mode, the Inrush current limit is
> at
> on mode, hence modeled by simple resistor, Rpse.
> Zo1 is the main power supply output impedance.
> Zo_pse is the PSE port output impedance.
>
> The PSE output port is connected to a cable modeled by low frequency
> components and connected to PD input port.
> At the PD input we can see C2 which is the small cap 50-100nF and the PD
> inrush current limiter which is at on mode and modeled by Rpd.
> An EMI filter is buffered between the PD input to the DC/DC converter
> input.
>
> The DC/DC converter input is not include the big cap at its input. This
> capacitor is part of the EMI filter and marked as CS2.
>
> The output of the EMI filter is designated by its output impedance Zo_pd
> without the effect of the DC/DC converter input impedance, Zin.
> Zin is the DC/DC converter input impedance.
>
> The trick here is to play with the impedances in order to ensure one basic
> requirement: Zo_pd must be well below Zin.
> Due to the fact that Zo_pd can have many forms pending of Zo1, Zo_pse,
> and
> the cable length, I have specified the worst case conditions and derived
> the
> requirements
> according to those conditions and ensuring that for all the other cases it
> will be the easier case.
>
> Page 4: Description of the problem and its origin.
>
> Page 5: Description of the impedance allocation map and the numbers
> required
> to ensure stability and PSE-PD inter operate.
>
> Worst case analysis shows that the worst case from small signal stability
> point of vie is when the cable is short.
> In this case we have the largest quality factor whenever we have LC
> circuits.
> Under the above conditions the EMI filter output impedance can increase to
> a
> level that it is changing the original PD DC/DC transfer function and
> change
> its original dynamic behavior and may introduce marginal stability at the
> EMI filter resonance frequency and/or the PSE output filter.
>
> Page 6: Proposed requirements from the PD.
> Page 7: Proposed requirements from PSE.
> Page 8: Requirements summary at full load condition marked on the system
> various segments.
>
> Please review the proposal and start comment on it in order to close this
> issue.
>
>
> Thanks
>
> Yair.
>
> <<PSE-PD STABILITY ANALYSIS - Draft.pdf>>
>
>
>
>
>
>
> Darshan Yair
> Chief Engineer
> > PowerDsine Ltd. - Powering Converged Networks
> > 1 Hanagar St., P.O. Box 7220
> > Neve Ne'eman Industrial Zone
> > Hod Hasharon 45421, Israel
> Tel: +972-9-775-5100, Ext. 210. Cell: +972-54-893019
> Fax: +972-9-775-5150
> > E-mail: <mailto:yaird@xxxxxxxxxxxxxx>.
> > http://www.powerdsine.com
> >
> >
> >
>
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