RE: [802.3af] Contradiction in Table 33-5
Hi Mike,
Please before you put a comment lets discuss it to avoid bad changes and
then new comments to fix it and than more meetings...etc..
See my comments to your description of the two modes.
Thanks
Yair.
-----Original Message-----
From: Mike_S_McCormack@xxxxxxxx [mailto:Mike_S_McCormack@xxxxxxxx]
Sent: Monday, March 31, 2003 8:18 PM
To: stds-802-3-pwrviamdi@xxxxxxxx
Subject: [802.3af] Contradiction in Table 33-5
I have seen two behaviors in PSEs, both of which I believe fall into the
OK category, and both of which at first pass were explained to me as being
the "proper" behavior while the other behavior was "non-standard." This
revolves around short circuit behavior.
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1) When the PSE is in the power on steady state and experiences a short
circuit, it goes into current limiting mode limiting its output to about
400mA while voltage plummets and shuts off after about 50ms.
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Yair: This is the correct behavior. It was required by the standard from the
following technical reasons:
1. To prevent shutting off the port due too current spikes during dynamic
load operation.
2. To support ripple current of up to 400mA for 50ms max at 5% duty cycle
max due to load changes at the PD.
3. To handle false positive overload generated when PSE has changed its
voltage from 44V to 57V moving from battery operation to normal operation
under a capacitor up to 180uF at the PD.
All of the above reasons force the behavior described in your item 1
scenario which is the 802.3af standard requirement.
All the above behaviors presented in the IEEE802.3af meetings in depth.
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It is claimed
that item 10 in table 33-5 requires current limiting.
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Yair: Yes it is requires CURRENT LIMIT that's why it is marked I_LIM... in
addition see drawing 33c.4 It is clearly described Current Limit
requirement.
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2) When the PSE is in the power on steady state and experiences a short
circuit, it ratchets up the current then nearly immediately shuts off after
output passes about 500mA (no current limiting, no delay is shut off.)
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Yair: This behavior is totally non standard behavior from the following
reasons:
1. Table 33-5 item 11 requires that the port will not be shut off before
50ms has passed from the reasons I have mentioned above.
2. 450mA is the max current after the 1st 1ms. See again figure 33c.4. So
500mA is OK only at the 1st 1ms, after 1ms it should be limited to 450mA
MAX.
Summary: This behavior is not according with 802.3af.
In addition, you may use Foldback current limit which allowed by the
standard and specified according the following rules:
During short circuit if the voltage is below 30V you can limit the current
to a number lower than 450mA as long as it is 60mA min but you can't shut
off the port before 50ms has passed. When 50ms has passed you should shut
off the port within the next 25ms so the port will be off after 75ms max.
-------------------------------------------------
It
is claimed that item 1 in table 33-5 requires the PSE to maintain the
voltage until the PSE operates outside the spec and then shuts off.
-----------------------------------
Yair: This is true as long as the current is less than 400mA which is during
the overload range but not at the I_lim range. See figure 33c.6 that
explains this.
During Overload range (table 33-5 items 8-9) you required to supprt output
voltage as required by item 1. If the current has reached above the current
specified in item 8 for a time more than specified in item 9 than you should
shut down the port.
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It seems to me that both of the designers have reason to point to the spec
and claim they are doing the right thing,
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I disagree! please ask the 2nd vendor to explain his arguments over the
reflector.
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and point to part of the spec and
claim the other guy is doing bad. I personally believe that either
behaviour is acceptable,
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Yair: The 2nd behavior will not work properly due to the reasons I have
mentioned above, and it is not allowed by the standard.
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and I expected to be allowed to choose either as
an implementation decision,
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Yair: The reasons for the current definitions was to avoid interoperability
problems.
If two vendor claims the opposite and use the standard to justify it is bad,
and I find no reason for it.
The 1st vendor is right.
You didn't state the arguments of the 2nd vendor and in my opinion there is
no point to raise comment unless we discuss the arguments.
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what I think its bad is that both designers
claim to be "right" and say the other designer was "wrong."
I'll be putting in a comment about this, maybe we can mull it over before
next week?
Mike