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[RPRWG] MSC study groups: memory channel and RPR on the backplane



To:  MSC
Cc:  P802.17 WG
     Bob Grow
FYI: sync-e

All,

Please forward this to whomever you deem appropriate. These topics are
intended to be open to all, but I hate to flood uninterested mailboxes.

As background, the MSC is similar to the LMSC, in that MSC sponsors
standard projects. Most noteable are IEEE 754 Floating Point
and IEEE 1394, and other microprocessor standards. More information
is available at: http://grouper.ieee.org/groups/msc/.

Bob David (MSC Chair) and myself have scheduled a teleconference, to
discuss the following, in preparation for the following MSC meeting,
which occurs on 2004Apr12.

  14:30 -- 1) Memory channel interface PAR
  15:30 -- 2) RPR on the backplane PAR
  16:30 -- 3) Discussion of OUIs: uniqueness and MSC assignments

From a formality perspective, topics (1) and (2) are study group
meetings; topic (3) is an adhoc meeting of (potentially) interested
parties.

For those that wish to come in person:
  1001 Bayhill drive, #180 San Bruno, CA 90466
  Host: 650-624-4715, leonard.tsai@xxxxxxxxxx
  Near the El Camino exit off Hwy 380, directions come later.

Conference facilities through freeconference.com:
  Date: Friday, April 02, 2004
  Start Time: 2:30 p.m. Pacific Std Time
  End Time: 5:25 p.m. Pacific Std Time
  Participants: 25
  Type of Conference: Web-Scheduled Standard
  Dial-in Number: 1-702-835-5000  (Las Vegas, Nevada)
  Participant Access Code: 159617

On topic (1), Bob Davis will be providing material for discussion.

On topic (2), some rough ideas for the PAR include the following:

  Based on the PRP draft, which includes:
    resilience, spatial reuse, some plug&play, some service classes
  Extensions that are needed:
    clarity of rate-counts and fairness
    elimination of burdensome options
    complete plug&play, complete bandwidth guarantees
  New facilities mandated by the environment:
    low latency (pre-emption, perhaps)
    synchronous services (compatible with sync-ethernet)
    destination-asserted reverse flow control
    backplane PHYs (perhaps leveraged from 802.xx)
    low-overhead shared memory primitives
  With the existing RPR PHYs, and the existing/enhanced RPR services,
    this should also meet the needs of RPR in-the-data-center.

More details and document will be provided.
RSVPs requested, so sufficient seats and phone-ports will be
available.

DVJ
MSC Secretary &
RPR on the backplane study group chair


David V. James
3180 South Ct
Palo Alto, CA 94306
Home: +1.650.494.0926
      +1.650.856.9801
Cell: +1.650.954.6906
Fax:  +1.360.242.5508
Base: dvj@xxxxxxxxxxxx