Dear Study Group Members,
I would like to submit the following clarification to the Tyco Electronics (TE) data provided in the November 2010 IEEE presentation "Call For Interest Consensus Presentation" (100GbE CFI), slide number 21
and 22. This data is excerpted from the DesignCon2009 paper " A Signal Integrity Comparison of 25Gbps Backplane Systems Using Varying High-Density Connector Performance Levels, Chad Morgan, Tyco Electronics". Please note that there was a typographical error
in the original submission that was corrected in the DesignCon2010 paper "Validation of Quasi-Analytical and Statistical Simulation Techniques for Multi-Gigabit Interconnect Channels, by Chad Morgan, Tyco Electronics". The legend on the data submitted to the
Nov 2010 IEEE 100GbE CFI (slide number 21) unfortunately included the typographical error. The error is with regard to the trace width on the backplane and daughter cards . In addition, please note that the baseline data for the board only (no connectors) configuration
included some idealized board layout and dielectric constant assumptions since the subject of the paper was to compare various generations of backplane connectors while keeping the rest of the channel configuration and environment constant (fixed) .
The correct board assumptions for the base channel (ideal connectors) were as follows:
1.) 0.14pF parasitic capacitance
2.) 4" of daughtercard trace (8/11/8 mil pair in 1.4 mil thick copper)(N4000-13SI using Dk=3.5, TanD=0.008, Freq=20 GHz, Djordjevic-Sarkar)
3.) 1.4" of connector (95/110/95 mil pair in 8 mil thick copper)(Dk=3.5, TanD=0.008, Freq=20 GHz, Djordjevic-Sarkar)
4.) 20" of backplane trace (8/11/8 mil pair in 1.4 mil thick copper)(N4000-13SI using Dk=3.5, TanD=0.008, Freq=20 GHz, Djordjevic-Sarkar)
5.) 1.4" of connector (95/110/95 mil pair in 8 mil thick copper)(Dk=3.5, TanD=0.008, Freq=20 GHz, Djordjevic-Sarkar)
6.) 4" of daughtercard trace (8/11/8 mil pair in 1.4 mil thick copper)(N4000-13SI using Dk=3.5, TanD=0.008, Freq=20 GHz, Djordjevic-Sarkar)
7.) 0.14pF parasitic capacitance
For channels with real connectors, the 1.4" length at each end of backplane is replaced by the specified connector along with corresponding backplane and daughtercard footprints.
I will be present at the Interim meeting in Fort Lauderdale next week. Should you have any further questions please do not hesitate to talk to me. Additional contact details are below.
Thank you,
Megha Shanbhag
Signal Integrity Engineer
Tyco Electronics
306 Constitution Drive
M.S. R33-01A
Menlo Park, CA 94025
650-361-2035 tel
megha.shanbhag@xxxxxx